Module Name: src
Committed By: jmcneill
Date: Sun May 3 11:46:25 UTC 2015
Modified Files:
src/sys/dev/sdmmc: sdhc.c sdhcvar.h
Log Message:
Add SDHC_FLAG_SINGLE_POWER_WRITE flag, that tells the driver to update
the SDHC_POWER_CTL register with a single write rather than in multiple
steps. Required for Tegra K1 SDHC.
To generate a diff of this commit:
cvs rdiff -u -r1.56 -r1.57 src/sys/dev/sdmmc/sdhc.c
cvs rdiff -u -r1.17 -r1.18 src/sys/dev/sdmmc/sdhcvar.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/sdmmc/sdhc.c
diff -u src/sys/dev/sdmmc/sdhc.c:1.56 src/sys/dev/sdmmc/sdhc.c:1.57
--- src/sys/dev/sdmmc/sdhc.c:1.56 Sat May 2 12:10:24 2015
+++ src/sys/dev/sdmmc/sdhc.c Sun May 3 11:46:25 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc.c,v 1.56 2015/05/02 12:10:24 jmcneill Exp $ */
+/* $NetBSD: sdhc.c,v 1.57 2015/05/03 11:46:25 jmcneill Exp $ */
/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
/*
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.56 2015/05/02 12:10:24 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.57 2015/05/03 11:46:25 jmcneill Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -755,13 +755,20 @@ sdhc_bus_power(sdmmc_chipset_handle_t sc
* Enable bus power. Wait at least 1 ms (or 74 clocks) plus
* voltage ramp until power rises.
*/
- HWRITE1(hp, SDHC_POWER_CTL,
- HREAD1(hp, SDHC_POWER_CTL) & pcmask);
- sdmmc_delay(1);
- HWRITE1(hp, SDHC_POWER_CTL, (vdd << SDHC_VOLTAGE_SHIFT));
- sdmmc_delay(1);
- HSET1(hp, SDHC_POWER_CTL, SDHC_BUS_POWER);
- sdmmc_delay(10000);
+
+ if (ISSET(hp->sc->sc_flags, SDHC_FLAG_SINGLE_POWER_WRITE)) {
+ HWRITE1(hp, SDHC_POWER_CTL,
+ (vdd << SDHC_VOLTAGE_SHIFT) | SDHC_BUS_POWER);
+ } else {
+ HWRITE1(hp, SDHC_POWER_CTL,
+ HREAD1(hp, SDHC_POWER_CTL) & pcmask);
+ sdmmc_delay(1);
+ HWRITE1(hp, SDHC_POWER_CTL,
+ (vdd << SDHC_VOLTAGE_SHIFT));
+ sdmmc_delay(1);
+ HSET1(hp, SDHC_POWER_CTL, SDHC_BUS_POWER);
+ sdmmc_delay(10000);
+ }
/*
* The host system may not power the bus due to battery low,
Index: src/sys/dev/sdmmc/sdhcvar.h
diff -u src/sys/dev/sdmmc/sdhcvar.h:1.17 src/sys/dev/sdmmc/sdhcvar.h:1.18
--- src/sys/dev/sdmmc/sdhcvar.h:1.17 Sat May 2 12:10:24 2015
+++ src/sys/dev/sdmmc/sdhcvar.h Sun May 3 11:46:25 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhcvar.h,v 1.17 2015/05/02 12:10:24 jmcneill Exp $ */
+/* $NetBSD: sdhcvar.h,v 1.18 2015/05/03 11:46:25 jmcneill Exp $ */
/* $OpenBSD: sdhcvar.h,v 1.3 2007/09/06 08:01:01 jsg Exp $ */
/*
@@ -53,6 +53,7 @@ struct sdhc_softc {
#define SDHC_FLAG_EXTERNAL_DMA 0x00004000
#define SDHC_FLAG_EXTDMA_DMAEN 0x00008000 /* ext. dma need SDHC_DMA_ENABLE */
#define SDHC_FLAG_NO_CLKBASE 0x00020000 /* ignore clkbase register */
+#define SDHC_FLAG_SINGLE_POWER_WRITE 0x00040000
uint32_t sc_clkbase;
int sc_clkmsk; /* Mask for SDCLK */
