Module Name: src
Committed By: jmcneill
Date: Sun May 3 22:37:27 UTC 2015
Modified Files:
src/sys/dev/sdmmc: sdhc.c
Log Message:
print some useful information at attach time
To generate a diff of this commit:
cvs rdiff -u -r1.57 -r1.58 src/sys/dev/sdmmc/sdhc.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/sdmmc/sdhc.c
diff -u src/sys/dev/sdmmc/sdhc.c:1.57 src/sys/dev/sdmmc/sdhc.c:1.58
--- src/sys/dev/sdmmc/sdhc.c:1.57 Sun May 3 11:46:25 2015
+++ src/sys/dev/sdmmc/sdhc.c Sun May 3 22:37:27 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: sdhc.c,v 1.57 2015/05/03 11:46:25 jmcneill Exp $ */
+/* $NetBSD: sdhc.c,v 1.58 2015/05/03 22:37:27 jmcneill Exp $ */
/* $OpenBSD: sdhc.c,v 1.25 2009/01/13 19:44:20 grange Exp $ */
/*
@@ -23,7 +23,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.57 2015/05/03 11:46:25 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sdhc.c,v 1.58 2015/05/03 22:37:27 jmcneill Exp $");
#ifdef _KERNEL_OPT
#include "opt_sdmmc.h"
@@ -274,7 +274,7 @@ sdhc_host_found(struct sdhc_softc *sc, b
} else {
sdhcver = HREAD2(hp, SDHC_HOST_CTL_VERSION);
}
- aprint_normal_dev(sc->sc_dev, "SD Host Specification ");
+ aprint_normal_dev(sc->sc_dev, "SDHC ");
hp->specver = SDHC_SPEC_VERSION(sdhcver);
switch (SDHC_SPEC_VERSION(sdhcver)) {
case SDHC_SPEC_VERS_100:
@@ -298,7 +298,7 @@ sdhc_host_found(struct sdhc_softc *sc, b
SDHC_SPEC_VERSION(sdhcver));
break;
}
- aprint_normal(", rev.%u\n", SDHC_VENDOR_VERSION(sdhcver));
+ aprint_normal(", rev %u", SDHC_VENDOR_VERSION(sdhcver));
/*
* Reset the host controller and enable interrupts.
@@ -327,7 +327,9 @@ sdhc_host_found(struct sdhc_softc *sc, b
ISSET(sc->sc_flags, SDHC_FLAG_EXTDMA_DMAEN))
SET(hp->flags, SHF_MODE_DMAEN);
- aprint_normal_dev(sc->sc_dev, "using DMA transfer\n");
+ aprint_normal(", DMA");
+ } else {
+ aprint_normal(", PIO");
}
/*
@@ -355,8 +357,7 @@ sdhc_host_found(struct sdhc_softc *sc, b
hp->clkbase / 1000);
goto err;
}
- DPRINTF(1,("%s: base clock frequency %u MHz\n",
- device_xname(sc->sc_dev), hp->clkbase / 1000));
+ aprint_normal(", %u kHz", hp->clkbase);
/*
* XXX Set the data timeout counter value according to
@@ -368,19 +369,26 @@ sdhc_host_found(struct sdhc_softc *sc, b
HWRITE4(hp, SDHC_NINTR_STATUS, SDHC_CMD_TIMEOUT_ERROR << 16);
#endif
+ if (ISSET(caps, SDHC_EMBEDDED_SLOT))
+ aprint_normal(", embedded slot");
+
/*
* Determine SD bus voltage levels supported by the controller.
*/
+ aprint_normal(",");
if (ISSET(caps, SDHC_VOLTAGE_SUPP_1_8V) &&
(hp->specver < SDHC_SPEC_VERS_300 ||
ISSET(caps, SDHC_EMBEDDED_SLOT))) {
SET(hp->ocr, MMC_OCR_1_7V_1_8V | MMC_OCR_1_8V_1_9V);
+ aprint_normal(" 1.8V");
}
if (ISSET(caps, SDHC_VOLTAGE_SUPP_3_0V)) {
SET(hp->ocr, MMC_OCR_2_9V_3_0V | MMC_OCR_3_0V_3_1V);
+ aprint_normal(" 3.0V");
}
if (ISSET(caps, SDHC_VOLTAGE_SUPP_3_3V)) {
SET(hp->ocr, MMC_OCR_3_2V_3_3V | MMC_OCR_3_3V_3_4V);
+ aprint_normal(" 3.3V");
}
/*
@@ -408,9 +416,8 @@ sdhc_host_found(struct sdhc_softc *sc, b
aprint_error_dev(sc->sc_dev, "max block length unknown\n");
goto err;
}
- DPRINTF(1, ("%s: max block length %u byte%s\n",
- device_xname(sc->sc_dev), hp->maxblklen,
- hp->maxblklen > 1 ? "s" : ""));
+ aprint_normal(", %u byte blocks", hp->maxblklen);
+ aprint_normal("\n");
/*
* Attach the generic SD/MMC bus driver. (The bus driver must
