Module Name: src
Committed By: jmcneill
Date: Fri May 15 11:50:30 UTC 2015
Modified Files:
src/sys/arch/arm/nvidia: tegra_ahcisata.c tegra_car.c tegra_pmc.c
tegra_pmcreg.h tegra_var.h
Log Message:
more Tegra SATA init
To generate a diff of this commit:
cvs rdiff -u -r1.4 -r1.5 src/sys/arch/arm/nvidia/tegra_ahcisata.c
cvs rdiff -u -r1.13 -r1.14 src/sys/arch/arm/nvidia/tegra_car.c
cvs rdiff -u -r1.3 -r1.4 src/sys/arch/arm/nvidia/tegra_pmc.c
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/arm/nvidia/tegra_pmcreg.h
cvs rdiff -u -r1.15 -r1.16 src/sys/arch/arm/nvidia/tegra_var.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/nvidia/tegra_ahcisata.c
diff -u src/sys/arch/arm/nvidia/tegra_ahcisata.c:1.4 src/sys/arch/arm/nvidia/tegra_ahcisata.c:1.5
--- src/sys/arch/arm/nvidia/tegra_ahcisata.c:1.4 Thu May 14 00:00:44 2015
+++ src/sys/arch/arm/nvidia/tegra_ahcisata.c Fri May 15 11:50:30 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_ahcisata.c,v 1.4 2015/05/14 00:00:44 jmcneill Exp $ */
+/* $NetBSD: tegra_ahcisata.c,v 1.5 2015/05/15 11:50:30 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <[email protected]>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_ahcisata.c,v 1.4 2015/05/14 00:00:44 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_ahcisata.c,v 1.5 2015/05/15 11:50:30 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -89,7 +89,7 @@ tegra_ahcisata_attach(device_t parent, d
bus_space_subregion(tio->tio_bst, tio->tio_bsh,
loc->loc_offset + TEGRA_AHCISATA_OFFSET,
loc->loc_size - TEGRA_AHCISATA_OFFSET, &sc->sc.sc_ahcih);
- sc->sc.sc_ahci_ports = 1;
+ sc->sc.sc_ahci_quirks = AHCI_QUIRK_BADPMP;
aprint_naive("\n");
aprint_normal(": SATA\n");
@@ -102,6 +102,8 @@ tegra_ahcisata_attach(device_t parent, d
tegra_car_periph_sata_enable();
+ tegra_xusbpad_sata_enable();
+
tegra_ahcisata_init(sc);
sc->sc_ih = intr_establish(loc->loc_intr, IPL_BIO, IST_LEVEL,
@@ -122,10 +124,34 @@ tegra_ahcisata_init(struct tegra_ahcisat
bus_space_tag_t bst = sc->sc_bst;
bus_space_handle_t bsh = sc->sc_bsh;
+ const u_int gen1_tx_amp = 0x18;
+ const u_int gen1_tx_peak = 0x04;
+ const u_int gen2_tx_amp = 0x18;
+ const u_int gen2_tx_peak = 0x0a;
+
/* Enable IFPS device block */
tegra_reg_set_clear(bst, bsh, TEGRA_SATA_CONFIGURATION_REG,
TEGRA_SATA_CONFIGURATION_EN_FPCI, 0);
+ /* PHY config */
+ bus_space_write_4(bst, bsh, TEGRA_T_SATA0_INDEX_REG,
+ TEGRA_T_SATA0_INDEX_CH1);
+ tegra_reg_set_clear(bst, bsh, TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN1_REG,
+ __SHIFTIN(gen1_tx_amp, TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP) |
+ __SHIFTIN(gen1_tx_peak, TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK),
+ TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN1_TX_AMP |
+ TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN1_TX_PEAK);
+ tegra_reg_set_clear(bst, bsh, TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN2_REG,
+ __SHIFTIN(gen2_tx_amp, TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN2_TX_AMP) |
+ __SHIFTIN(gen2_tx_peak, TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN2_TX_PEAK),
+ TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN2_TX_AMP |
+ TEGRA_T_SATA0_CHX_PHY_CTRL1_GEN2_TX_PEAK);
+ bus_space_write_4(bst, bsh, TEGRA_T_SATA0_CHX_PHY_CTRL11_REG,
+ __SHIFTIN(0x2800, TEGRA_T_SATA0_CHX_PHY_CTRL11_GEN2_RX_EQ));
+ bus_space_write_4(bst, bsh, TEGRA_T_SATA0_CHX_PHY_CTRL2_REG,
+ __SHIFTIN(0x23, TEGRA_T_SATA0_CHX_PHY_CTRL2_CDR_CNTL_GEN1));
+ bus_space_write_4(bst, bsh, TEGRA_T_SATA0_INDEX_REG, 0);
+
/* Backdoor update the programming interface field and class code */
tegra_reg_set_clear(bst, bsh, TEGRA_T_SATA0_CFG_SATA_REG,
TEGRA_T_SATA0_CFG_SATA_BACKDOOR_PROG_IF_EN, 0);
Index: src/sys/arch/arm/nvidia/tegra_car.c
diff -u src/sys/arch/arm/nvidia/tegra_car.c:1.13 src/sys/arch/arm/nvidia/tegra_car.c:1.14
--- src/sys/arch/arm/nvidia/tegra_car.c:1.13 Thu May 14 10:23:03 2015
+++ src/sys/arch/arm/nvidia/tegra_car.c Fri May 15 11:50:30 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_car.c,v 1.13 2015/05/14 10:23:03 jmcneill Exp $ */
+/* $NetBSD: tegra_car.c,v 1.14 2015/05/15 11:50:30 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <[email protected]>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.13 2015/05/14 10:23:03 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_car.c,v 1.14 2015/05/15 11:50:30 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -462,39 +462,51 @@ tegra_car_periph_sata_enable(void)
tegra_car_get_bs(&bst, &bsh);
- const u_int pllp_rate = tegra_car_pllp0_rate();
+ /* Assert resets */
+ bus_space_write_4(bst, bsh, CAR_RST_DEV_V_SET_REG, CAR_DEV_V_SATA);
+ bus_space_write_4(bst, bsh, CAR_RST_DEV_W_SET_REG, CAR_DEV_W_SATACOLD);
+
+ /* Disable software control of SATA PLL */
+ tegra_reg_set_clear(bst, bsh, CAR_SATA_PLL_CFG0_REG,
+ 0, CAR_SATA_PLL_CFG0_PADPLL_RESET_SWCTL);
/* Set SATA_OOB clock source to PLLP, 204MHz */
- const u_int sataoob_div = pllp_rate / 200000000;
+ const u_int sataoob_div = 2;
bus_space_write_4(bst, bsh, CAR_CLKSRC_SATA_OOB_REG,
- __SHIFTIN(CAR_CLKSRC_SATA_SRC_PLLP_OUT0,
- CAR_CLKSRC_SATA_SRC) |
+ __SHIFTIN(CAR_CLKSRC_SATA_OOB_SRC_PLLP_OUT0,
+ CAR_CLKSRC_SATA_OOB_SRC) |
__SHIFTIN(sataoob_div - 1, CAR_CLKSRC_SATA_OOB_DIV));
/* Set SATA clock source to PLLP, 102MHz */
- const u_int sata_div = pllp_rate / 100000000;
+ const u_int sata_div = 4;
bus_space_write_4(bst, bsh, CAR_CLKSRC_SATA_REG,
CAR_CLKSRC_SATA_AUX_CLK_ENB |
__SHIFTIN(CAR_CLKSRC_SATA_SRC_PLLP_OUT0,
CAR_CLKSRC_SATA_SRC) |
__SHIFTIN(sata_div - 1, CAR_CLKSRC_SATA_DIV));
- /* Enable CML clock for SATA */
- tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG,
- CAR_PLLE_AUX_CML1_OEN, 0);
+ /* Ungate SAX partition in the PMC */
+ tegra_pmc_power(PMC_PARTID_SAX, true);
+ delay(20);
+
+ /* Remove clamping from SAX partition in the PMC */
+ tegra_pmc_remove_clamping(PMC_PARTID_SAX);
+ delay(20);
/* De-assert reset to SATA PADPLL */
tegra_reg_set_clear(bst, bsh, CAR_SATA_PLL_CFG0_REG,
0, CAR_SATA_PLL_CFG0_PADPLL_RESET_OVERRIDE_VALUE);
delay(15);
- /* Ungate SAX partition in the PMC */
- tegra_pmc_power(PMC_PARTID_SAX, true);
+ /* Enable CML clock for SATA */
+ tegra_reg_set_clear(bst, bsh, CAR_PLLE_AUX_REG,
+ CAR_PLLE_AUX_CML1_OEN, 0);
/* Turn on the clocks to SATA and de-assert resets */
bus_space_write_4(bst, bsh, CAR_CLK_ENB_W_SET_REG, CAR_DEV_W_SATACOLD);
bus_space_write_4(bst, bsh, CAR_CLK_ENB_V_SET_REG, CAR_DEV_V_SATA);
bus_space_write_4(bst, bsh, CAR_CLK_ENB_V_SET_REG, CAR_DEV_V_SATA_OOB);
+
bus_space_write_4(bst, bsh, CAR_RST_DEV_W_CLR_REG, CAR_DEV_W_SATACOLD);
bus_space_write_4(bst, bsh, CAR_RST_DEV_V_CLR_REG, CAR_DEV_V_SATA);
}
Index: src/sys/arch/arm/nvidia/tegra_pmc.c
diff -u src/sys/arch/arm/nvidia/tegra_pmc.c:1.3 src/sys/arch/arm/nvidia/tegra_pmc.c:1.4
--- src/sys/arch/arm/nvidia/tegra_pmc.c:1.3 Sun Apr 26 22:04:28 2015
+++ src/sys/arch/arm/nvidia/tegra_pmc.c Fri May 15 11:50:30 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_pmc.c,v 1.3 2015/04/26 22:04:28 jmcneill Exp $ */
+/* $NetBSD: tegra_pmc.c,v 1.4 2015/05/15 11:50:30 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <[email protected]>
@@ -29,7 +29,7 @@
#include "locators.h"
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tegra_pmc.c,v 1.3 2015/04/26 22:04:28 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tegra_pmc.c,v 1.4 2015/05/15 11:50:30 jmcneill Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -131,3 +131,15 @@ tegra_pmc_power(u_int partid, bool enabl
__SHIFTIN(partid, PMC_PWRGATE_TOGGLE_0_PARTID) |
PMC_PWRGATE_TOGGLE_0_START);
}
+
+void
+tegra_pmc_remove_clamping(u_int partid)
+{
+ bus_space_tag_t bst;
+ bus_space_handle_t bsh;
+
+ tegra_pmc_get_bs(&bst, &bsh);
+
+ bus_space_write_4(bst, bsh, PMC_REMOVE_CLAMPING_CMD_0_REG,
+ __BIT(partid));
+}
Index: src/sys/arch/arm/nvidia/tegra_pmcreg.h
diff -u src/sys/arch/arm/nvidia/tegra_pmcreg.h:1.2 src/sys/arch/arm/nvidia/tegra_pmcreg.h:1.3
--- src/sys/arch/arm/nvidia/tegra_pmcreg.h:1.2 Sun Apr 26 22:04:28 2015
+++ src/sys/arch/arm/nvidia/tegra_pmcreg.h Fri May 15 11:50:30 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_pmcreg.h,v 1.2 2015/04/26 22:04:28 jmcneill Exp $ */
+/* $NetBSD: tegra_pmcreg.h,v 1.3 2015/05/15 11:50:30 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <[email protected]>
@@ -58,6 +58,8 @@
#define PMC_PWRGATE_TOGGLE_0_START __BIT(8)
#define PMC_PWRGATE_TOGGLE_0_PARTID __BITS(4,0)
+#define PMC_REMOVE_CLAMPING_CMD_0_REG 0x34
+
#define PMC_PWRGATE_STATUS_0_REG 0x38
#define PMC_PARTID_IRAM 24
Index: src/sys/arch/arm/nvidia/tegra_var.h
diff -u src/sys/arch/arm/nvidia/tegra_var.h:1.15 src/sys/arch/arm/nvidia/tegra_var.h:1.16
--- src/sys/arch/arm/nvidia/tegra_var.h:1.15 Wed May 13 11:06:13 2015
+++ src/sys/arch/arm/nvidia/tegra_var.h Fri May 15 11:50:30 2015
@@ -1,4 +1,4 @@
-/* $NetBSD: tegra_var.h,v 1.15 2015/05/13 11:06:13 jmcneill Exp $ */
+/* $NetBSD: tegra_var.h,v 1.16 2015/05/15 11:50:30 jmcneill Exp $ */
/*-
* Copyright (c) 2015 Jared D. McNeill <[email protected]>
@@ -120,9 +120,12 @@ bool tegra_mpio_pinmux_get_rcv_sel(u_int
void tegra_pmc_reset(void);
void tegra_pmc_power(u_int, bool);
+void tegra_pmc_remove_clamping(u_int);
psize_t tegra_mc_memsize(void);
+void tegra_xusbpad_sata_enable(void);
+
#define TEGRA_CPUFREQ_MAX 16
struct tegra_cpufreq_func {
u_int (*set_rate)(u_int);
