CVS commit: src/sys/arch/mips/mips

[Martin Husemann]

Module Name:    src
Committed By:   martin
Date:           Sat Mar 26 17:40:02 UTC 2016

Modified Files:
        src/sys/arch/mips/mips: mips_fpu.c

Log Message:
Do not touch FP register on softfloat kernels.


To generate a diff of this commit:
cvs rdiff -u -r1.12 -r1.13 src/sys/arch/mips/mips/mips_fpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.


Modified files:

Index: src/sys/arch/mips/mips/mips_fpu.c
diff -u src/sys/arch/mips/mips/mips_fpu.c:1.12 src/sys/arch/mips/mips/mips_fpu.c:1.13
--- src/sys/arch/mips/mips/mips_fpu.c:1.12	Fri May 16 00:48:41 2014
+++ src/sys/arch/mips/mips/mips_fpu.c	Sat Mar 26 17:40:02 2016
@@ -1,4 +1,4 @@
-/*	$NetBSD: mips_fpu.c,v 1.12 2014/05/16 00:48:41 rmind Exp $	*/
+/*	$NetBSD: mips_fpu.c,v 1.13 2016/03/26 17:40:02 martin Exp $	*/
 
 /*-
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mips_fpu.c,v 1.12 2014/05/16 00:48:41 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mips_fpu.c,v 1.13 2016/03/26 17:40:02 martin Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -85,8 +85,10 @@ void
 mips_fpu_state_save(lwp_t *l)
 {
 	struct trapframe * const tf = l->l_md.md_utf;
+#ifndef __mips_soft_float
 	struct pcb * const pcb = lwp_getpcb(l);
 	mips_fpreg_t * const fp = pcb->pcb_fpregs.r_regs;
+#endif
 	uint32_t status, fpcsr;
 
 	/*
@@ -118,6 +120,7 @@ mips_fpu_state_save(lwp_t *l)
 	/*
 	 * save FPCSR and FP register values.
 	 */
+#if !defined(__mips_soft_float)
 #if !defined(__mips_o32)
 	if (tf->tf_regs[_R_SR] & MIPS3_SR_FR) {
 		KASSERT(_MIPS_SIM_NEWABI_P(l->l_proc->p_md.md_abi));
@@ -198,6 +201,7 @@ mips_fpu_state_save(lwp_t *l)
 			"swc1	$f31, (31*%d1)(%0)	;"
 		".set reorder" :: "r"(fp), "i"(4));
 	}
+#endif
 	/*
 	 * stop COP1
 	 */
@@ -209,7 +213,9 @@ mips_fpu_state_load(lwp_t *l, u_int flag
 {
 	struct trapframe * const tf = l->l_md.md_utf;
 	struct pcb * const pcb = lwp_getpcb(l);
+#ifndef __mips_soft_float
 	mips_fpreg_t * const fp = pcb->pcb_fpregs.r_regs;
+#endif
 	uint32_t status;
 	uint32_t fpcsr;
 
@@ -244,6 +250,7 @@ mips_fpu_state_load(lwp_t *l, u_int flag
 	/*
 	 * load FP registers and establish processes' FP context.
 	 */
+#if !defined(__mips_soft_float)
 #if !defined(__mips_o32)
 	if (tf->tf_regs[_R_SR] & MIPS3_SR_FR) {
 		KASSERT(_MIPS_SIM_NEWABI_P(l->l_proc->p_md.md_abi));
@@ -326,6 +333,9 @@ mips_fpu_state_load(lwp_t *l, u_int flag
 		    : "r"(fp), "i"(4));
 		fpcsr = ((int *)fp)[32];
 	}
+#else
+	fpcsr = 0;
+#endif
 
 	/*
 	 * load FPCSR and stop COP1 again