Module Name: src
Committed By: skrll
Date: Fri Aug 19 10:05:35 UTC 2016
Modified Files:
src/sys/arch/mips/mips: cache.c lock_stubs_llsc.S lock_stubs_ras.S
locore.S pmap_machdep.c
Log Message:
Trailing whitespace
To generate a diff of this commit:
cvs rdiff -u -r1.52 -r1.53 src/sys/arch/mips/mips/cache.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/mips/mips/lock_stubs_llsc.S
cvs rdiff -u -r1.7 -r1.8 src/sys/arch/mips/mips/lock_stubs_ras.S
cvs rdiff -u -r1.205 -r1.206 src/sys/arch/mips/mips/locore.S
cvs rdiff -u -r1.2 -r1.3 src/sys/arch/mips/mips/pmap_machdep.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cache.c
diff -u src/sys/arch/mips/mips/cache.c:1.52 src/sys/arch/mips/mips/cache.c:1.53
--- src/sys/arch/mips/mips/cache.c:1.52 Mon Jul 11 23:06:54 2016
+++ src/sys/arch/mips/mips/cache.c Fri Aug 19 10:05:35 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: cache.c,v 1.52 2016/07/11 23:06:54 matt Exp $ */
+/* $NetBSD: cache.c,v 1.53 2016/08/19 10:05:35 skrll Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@@ -68,7 +68,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.52 2016/07/11 23:06:54 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cache.c,v 1.53 2016/08/19 10:05:35 skrll Exp $");
#include "opt_cputype.h"
#include "opt_mips_cache.h"
@@ -191,7 +191,7 @@ mips_config_cache(void)
struct mips_cache_ops * const mco = &mips_cache_ops;
#endif
const mips_prid_t cpu_id = mips_options.mips_cpu_id;
-
+
#if defined(MIPS1) || defined(MIPS3) || defined(MIPS4)
if (MIPS_PRID_CID(cpu_id) == MIPS_PRID_CID_PREHISTORIC)
mips_config_cache_prehistoric();
@@ -1008,7 +1008,7 @@ mips3_get_cache_config(int csizebase)
break;
}
- /*
+ /*
* If CPU has a software-enabled L2 cache, check both if it's
* present and if it's enabled before making assumptions the
* L2 is usable. If the L2 is disabled, we treat it the same
@@ -1017,7 +1017,7 @@ mips3_get_cache_config(int csizebase)
if ((config & MIPS3_CONFIG_SC) == 0) {
if (has_sdcache_enable == 0 ||
(has_sdcache_enable && (config & MIPS3_CONFIG_SE))) {
- mci->mci_sdcache_line_size =
+ mci->mci_sdcache_line_size =
MIPS3_CONFIG_CACHE_L2_LSIZE(config);
if ((config & MIPS3_CONFIG_SS) == 0)
mci->mci_scache_unified = true;
@@ -1382,12 +1382,12 @@ mips_config_cache_modern(uint32_t cpu_id
}
}
- /*
+ /*
* calculate the alias masks and from them set to virtual alias flags.
- */
+ */
mci->mci_cache_alias_mask = mci->mci_pdcache_way_mask & -PAGE_SIZE;
mci->mci_cache_virtual_alias = (mci->mci_cache_alias_mask != 0);
-
+
mci->mci_icache_alias_mask = mci->mci_picache_way_mask & -PAGE_SIZE;
mci->mci_icache_virtual_alias = (mci->mci_icache_alias_mask != 0);
@@ -1410,7 +1410,7 @@ mips_config_cache_modern(uint32_t cpu_id
}
} else if (MIPS_PRID_CID(cpu_id) == MIPS_PRID_CID_MTI) {
/*
- * All MTI cores share a (mostly) common config7 defintion.
+ * All MTI cores share a (mostly) common config7 defintion.
* Use it to determine if the caches have virtual aliases.
* If the core doesn't have a config7 register, its caches
* are too small or have too many ways to have aliases.
Index: src/sys/arch/mips/mips/lock_stubs_llsc.S
diff -u src/sys/arch/mips/mips/lock_stubs_llsc.S:1.6 src/sys/arch/mips/mips/lock_stubs_llsc.S:1.7
--- src/sys/arch/mips/mips/lock_stubs_llsc.S:1.6 Wed Jul 27 09:32:35 2016
+++ src/sys/arch/mips/mips/lock_stubs_llsc.S Fri Aug 19 10:05:35 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: lock_stubs_llsc.S,v 1.6 2016/07/27 09:32:35 skrll Exp $ */
+/* $NetBSD: lock_stubs_llsc.S,v 1.7 2016/08/19 10:05:35 skrll Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -15,7 +15,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
@@ -37,7 +37,7 @@
#include <machine/asm.h>
-RCSID("$NetBSD: lock_stubs_llsc.S,v 1.6 2016/07/27 09:32:35 skrll Exp $")
+RCSID("$NetBSD: lock_stubs_llsc.S,v 1.7 2016/08/19 10:05:35 skrll Exp $")
#include "assym.h"
Index: src/sys/arch/mips/mips/lock_stubs_ras.S
diff -u src/sys/arch/mips/mips/lock_stubs_ras.S:1.7 src/sys/arch/mips/mips/lock_stubs_ras.S:1.8
--- src/sys/arch/mips/mips/lock_stubs_ras.S:1.7 Wed Jul 27 09:32:35 2016
+++ src/sys/arch/mips/mips/lock_stubs_ras.S Fri Aug 19 10:05:35 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: lock_stubs_ras.S,v 1.7 2016/07/27 09:32:35 skrll Exp $ */
+/* $NetBSD: lock_stubs_ras.S,v 1.8 2016/08/19 10:05:35 skrll Exp $ */
/*-
* Copyright (c) 2007 The NetBSD Foundation, Inc.
@@ -15,7 +15,7 @@
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
- *
+ *
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
@@ -37,7 +37,7 @@
#include <machine/asm.h>
-RCSID("$NetBSD: lock_stubs_ras.S,v 1.7 2016/07/27 09:32:35 skrll Exp $")
+RCSID("$NetBSD: lock_stubs_ras.S,v 1.8 2016/08/19 10:05:35 skrll Exp $")
#include "assym.h"
@@ -196,7 +196,7 @@ STATIC_LEAF_NOPROFILE(ras_mutex_enter)
_mutex_enter_ras_start:
nop
bnez t0, ras_mutex_vector_enter
- nop
+ nop
PTR_S MIPS_CURLWP, (a0)/* <- critical section end */
_mutex_enter_ras_end:
J_RA
@@ -215,7 +215,7 @@ STATIC_LEAF_NOPROFILE(ras_mutex_exit)
_mutex_exit_ras_start:
nop
bne t0, MIPS_CURLWP, ras_mutex_vector_exit
- nop
+ nop
PTR_S zero, (a0) /* <- critical section end */
_mutex_exit_ras_exit:
J_RA
@@ -299,7 +299,7 @@ LEAF_NOPROFILE(_restart_lock_ras)
andi t1, RAS_MASK /* was the PC in a RAS? */
bnez t1, 1f /* yes, adjust PC */
and t0, k1, 15 /* get offset in RAS */
-
+
j ra
nop
1:
Index: src/sys/arch/mips/mips/locore.S
diff -u src/sys/arch/mips/mips/locore.S:1.205 src/sys/arch/mips/mips/locore.S:1.206
--- src/sys/arch/mips/mips/locore.S:1.205 Sat Aug 13 08:08:11 2016
+++ src/sys/arch/mips/mips/locore.S Fri Aug 19 10:05:35 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.S,v 1.205 2016/08/13 08:08:11 skrll Exp $ */
+/* $NetBSD: locore.S,v 1.206 2016/08/19 10:05:35 skrll Exp $ */
/*
* Copyright (c) 1992, 1993
@@ -62,7 +62,7 @@
#include <mips/cpuregs.h>
#include <mips/trap.h>
-RCSID("$NetBSD: locore.S,v 1.205 2016/08/13 08:08:11 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.206 2016/08/19 10:05:35 skrll Exp $")
#include "assym.h"
@@ -493,7 +493,7 @@ LEAF(lwp_oncpu)
jr ra # and return.
nop
END(lwp_oncpu)
-
+
/*
* void savectx(struct pcb *)
@@ -821,7 +821,7 @@ END(mips_pagezero)
#ifndef DDB_TRACE
-
+
#if defined(DEBUG) || defined(DDB) || defined(KGDB) || defined(geo)
/*
* Stacktrace support hooks which use type punnign to access
Index: src/sys/arch/mips/mips/pmap_machdep.c
diff -u src/sys/arch/mips/mips/pmap_machdep.c:1.2 src/sys/arch/mips/mips/pmap_machdep.c:1.3
--- src/sys/arch/mips/mips/pmap_machdep.c:1.2 Fri Jul 29 15:43:02 2016
+++ src/sys/arch/mips/mips/pmap_machdep.c Fri Aug 19 10:05:35 2016
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap_machdep.c,v 1.2 2016/07/29 15:43:02 skrll Exp $ */
+/* $NetBSD: pmap_machdep.c,v 1.3 2016/08/19 10:05:35 skrll Exp $ */
/*-
* Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
@@ -67,7 +67,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.2 2016/07/29 15:43:02 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap_machdep.c,v 1.3 2016/08/19 10:05:35 skrll Exp $");
/*
* Manages physical address maps.
@@ -163,7 +163,7 @@ CTASSERT(VM_MIN_KERNEL_ADDRESS % NBSEG =
PMAP_COUNTER(zeroed_pages, "pages zeroed");
PMAP_COUNTER(copied_pages, "pages copied");
extern struct evcnt pmap_evcnt_page_cache_evictions;
-
+
static register_t
pmap_md_map_ephemeral_page(struct vm_page *pg, bool locked_p, int prot,
pt_entry_t *old_pte_p)
@@ -420,7 +420,7 @@ pmap_bootstrap(void)
vaddr_t va = VM_MIN_KERNEL_ADDRESS;
#ifdef _LP64
- /*
+ /*
* Do we need more than one XSEG's worth virtual address space?
* If so, we have to allocate the additional pmap_segtab_t's for them
* and insert them into the kernel's top level segtab.
@@ -830,13 +830,13 @@ pmap_md_tlb_check_entry(void *ctx, vaddr
} else {
xpte &= ~(MIPS1_PG_WIRED|MIPS1_PG_RO);
}
-
+
KASSERTMSG(pte == xpte,
"pmap=%p va=%#"PRIxVADDR" asid=%u: TLB pte (%#"PRIxPTE
") != real pte (%#"PRIxPTE"/%#"PRIxPTE") @ %p",
pm, va, asid, pte_value(pte), pte_value(xpte), pte_value(opte),
ptep);
-
+
return true;
}
