Module Name:    src
Committed By:   jmcneill
Date:           Sat Sep 30 12:48:58 UTC 2017

Modified Files:
        src/sys/arch/arm/sunxi: files.sunxi sunxi_ccu.c sunxi_ccu.h
Added Files:
        src/sys/arch/arm/sunxi: sun8i_h3_r_ccu.c sun8i_h3_r_ccu.h
            sunxi_ccu_fixed_factor.c

Log Message:
Add support for Allwinner H3 PRCM clock controller.


To generate a diff of this commit:
cvs rdiff -u -r1.23 -r1.24 src/sys/arch/arm/sunxi/files.sunxi
cvs rdiff -u -r0 -r1.1 src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.c \
    src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.h \
    src/sys/arch/arm/sunxi/sunxi_ccu_fixed_factor.c
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/sunxi/sunxi_ccu.c
cvs rdiff -u -r1.10 -r1.11 src/sys/arch/arm/sunxi/sunxi_ccu.h

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/arm/sunxi/files.sunxi
diff -u src/sys/arch/arm/sunxi/files.sunxi:1.23 src/sys/arch/arm/sunxi/files.sunxi:1.24
--- src/sys/arch/arm/sunxi/files.sunxi:1.23	Sat Sep  9 12:01:04 2017
+++ src/sys/arch/arm/sunxi/files.sunxi	Sat Sep 30 12:48:58 2017
@@ -1,4 +1,4 @@
-#	$NetBSD: files.sunxi,v 1.23 2017/09/09 12:01:04 jmcneill Exp $
+#	$NetBSD: files.sunxi,v 1.24 2017/09/30 12:48:58 jmcneill Exp $
 #
 # Configuration info for Allwinner sunxi family SoCs
 #
@@ -21,6 +21,7 @@ file	arch/arm/sunxi/sunxi_platform.c		so
 define	sunxi_ccu
 file	arch/arm/sunxi/sunxi_ccu.c		sunxi_ccu
 file	arch/arm/sunxi/sunxi_ccu_div.c		sunxi_ccu
+file	arch/arm/sunxi/sunxi_ccu_fixed_factor.c	sunxi_ccu
 file	arch/arm/sunxi/sunxi_ccu_gate.c		sunxi_ccu
 file	arch/arm/sunxi/sunxi_ccu_nm.c		sunxi_ccu
 file	arch/arm/sunxi/sunxi_ccu_nkmp.c		sunxi_ccu
@@ -47,6 +48,11 @@ device	sun8ih3ccu: sunxi_ccu
 attach	sun8ih3ccu at fdt with sunxi_h3_ccu
 file	arch/arm/sunxi/sun8i_h3_ccu.c		sunxi_h3_ccu
 
+# CCU (H3 PRCM)
+device	sun8ih3rccu: sunxi_ccu
+attach	sun8ih3rccu at fdt with sunxi_h3_r_ccu
+file	arch/arm/sunxi/sun8i_h3_r_ccu.c		sunxi_h3_r_ccu
+
 # CCU (A64)
 device	sun50ia64ccu: sunxi_ccu
 attach	sun50ia64ccu at fdt with sunxi_a64_ccu

Index: src/sys/arch/arm/sunxi/sunxi_ccu.c
diff -u src/sys/arch/arm/sunxi/sunxi_ccu.c:1.6 src/sys/arch/arm/sunxi/sunxi_ccu.c:1.7
--- src/sys/arch/arm/sunxi/sunxi_ccu.c:1.6	Mon Jul 17 23:26:17 2017
+++ src/sys/arch/arm/sunxi/sunxi_ccu.c	Sat Sep 30 12:48:58 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_ccu.c,v 1.6 2017/07/17 23:26:17 jmcneill Exp $ */
+/* $NetBSD: sunxi_ccu.c,v 1.7 2017/09/30 12:48:58 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -31,7 +31,7 @@
 #include "opt_fdt_arm.h"
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sunxi_ccu.c,v 1.6 2017/07/17 23:26:17 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sunxi_ccu.c,v 1.7 2017/09/30 12:48:58 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -324,13 +324,14 @@ sunxi_ccu_print(struct sunxi_ccu_softc *
 		clkp_parent = clk_get_parent(&clk->base);
 
 		switch (clk->type) {
-		case SUNXI_CCU_GATE:	type = "gate"; break;
-		case SUNXI_CCU_NM:	type = "nm"; break;
-		case SUNXI_CCU_NKMP:	type = "nkmp"; break;
-		case SUNXI_CCU_PREDIV:	type = "prediv"; break;
-		case SUNXI_CCU_DIV:	type = "div"; break;
-		case SUNXI_CCU_PHASE:	type = "phase"; break;
-		default:		type = "???"; break;
+		case SUNXI_CCU_GATE:		type = "gate"; break;
+		case SUNXI_CCU_NM:		type = "nm"; break;
+		case SUNXI_CCU_NKMP:		type = "nkmp"; break;
+		case SUNXI_CCU_PREDIV:		type = "prediv"; break;
+		case SUNXI_CCU_DIV:		type = "div"; break;
+		case SUNXI_CCU_PHASE:		type = "phase"; break;
+		case SUNXI_CCU_FIXED_FACTOR:	type = "fixed-factor"; break;
+		default:			type = "???"; break;
 		}
 
         	aprint_debug_dev(sc->sc_dev,

Index: src/sys/arch/arm/sunxi/sunxi_ccu.h
diff -u src/sys/arch/arm/sunxi/sunxi_ccu.h:1.10 src/sys/arch/arm/sunxi/sunxi_ccu.h:1.11
--- src/sys/arch/arm/sunxi/sunxi_ccu.h:1.10	Fri Aug 25 00:07:03 2017
+++ src/sys/arch/arm/sunxi/sunxi_ccu.h	Sat Sep 30 12:48:58 2017
@@ -1,4 +1,4 @@
-/* $NetBSD: sunxi_ccu.h,v 1.10 2017/08/25 00:07:03 jmcneill Exp $ */
+/* $NetBSD: sunxi_ccu.h,v 1.11 2017/09/30 12:48:58 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
@@ -62,6 +62,7 @@ enum sunxi_ccu_clktype {
 	SUNXI_CCU_PREDIV,
 	SUNXI_CCU_DIV,
 	SUNXI_CCU_PHASE,
+	SUNXI_CCU_FIXED_FACTOR,
 };
 
 struct sunxi_ccu_gate {
@@ -305,6 +306,28 @@ const char *sunxi_ccu_phase_get_parent(s
 		.get_parent = sunxi_ccu_phase_get_parent,	\
 	}
 
+struct sunxi_ccu_fixed_factor {
+	const char	*parent;
+	u_int		div;
+	u_int		mult;
+};
+
+u_int	sunxi_ccu_fixed_factor_get_rate(struct sunxi_ccu_softc *,
+					struct sunxi_ccu_clk *);
+const char *sunxi_ccu_fixed_factor_get_parent(struct sunxi_ccu_softc *,
+					      struct sunxi_ccu_clk *);
+
+#define	SUNXI_CCU_FIXED_FACTOR(_id, _name, _parent, _div, _mult)	\
+	[_id] = {							\
+		.type = SUNXI_CCU_FIXED_FACTOR,				\
+		.base.name = (_name),					\
+		.u.fixed_factor.parent = (_parent),			\
+		.u.fixed_factor.div = (_div),				\
+		.u.fixed_factor.mult = (_mult),				\
+		.get_rate = sunxi_ccu_fixed_factor_get_rate,		\
+		.get_parent = sunxi_ccu_fixed_factor_get_parent,	\
+	}
+
 struct sunxi_ccu_clk {
 	struct clk	base;
 	enum sunxi_ccu_clktype type;
@@ -315,6 +338,7 @@ struct sunxi_ccu_clk {
 		struct sunxi_ccu_prediv prediv;
 		struct sunxi_ccu_div div;
 		struct sunxi_ccu_phase phase;
+		struct sunxi_ccu_fixed_factor fixed_factor;
 	} u;
 
 	int		(*enable)(struct sunxi_ccu_softc *,

Added files:

Index: src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.c
diff -u /dev/null src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.c:1.1
--- /dev/null	Sat Sep 30 12:48:58 2017
+++ src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.c	Sat Sep 30 12:48:58 2017
@@ -0,0 +1,129 @@
+/* $NetBSD: sun8i_h3_r_ccu.c,v 1.1 2017/09/30 12:48:58 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+
+__KERNEL_RCSID(1, "$NetBSD: sun8i_h3_r_ccu.c,v 1.1 2017/09/30 12:48:58 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/systm.h>
+
+#include <dev/fdt/fdtvar.h>
+
+#include <arm/sunxi/sunxi_ccu.h>
+#include <arm/sunxi/sun8i_h3_r_ccu.h>
+
+#define	AR100_CFG_REG		0x00
+#define	APB0_CFG_REG		0x0c
+#define	APB0_GATE_REG		0x28
+#define	APB0_RESET_REG		0xb0
+
+static int sun8i_h3_r_ccu_match(device_t, cfdata_t, void *);
+static void sun8i_h3_r_ccu_attach(device_t, device_t, void *);
+
+static const char * const compatible[] = {
+	"allwinner,sun8i-h3-r-ccu",
+	NULL
+};
+
+CFATTACH_DECL_NEW(sunxi_h3_r_ccu, sizeof(struct sunxi_ccu_softc),
+	sun8i_h3_r_ccu_match, sun8i_h3_r_ccu_attach, NULL, NULL);
+
+static struct sunxi_ccu_reset sun8i_h3_r_ccu_resets[] = {
+	SUNXI_CCU_RESET(H3_R_RST_APB0_IR, APB0_RESET_REG, 1),
+	SUNXI_CCU_RESET(H3_R_RST_APB0_TIMER, APB0_RESET_REG, 2),
+	SUNXI_CCU_RESET(H3_R_RST_APB0_UART, APB0_RESET_REG, 4),
+	SUNXI_CCU_RESET(H3_R_RST_APB0_I2C, APB0_RESET_REG, 6),
+};
+
+static const char *ar100_parents[] = { "losc", "hosc", "pll_periph0", "losc" };
+static const char *apb0_parents[] = { "ahb0" };
+
+static struct sunxi_ccu_clk sun8i_h3_r_ccu_clks[] = {
+	SUNXI_CCU_PREDIV(H3_R_CLK_AR100, "ar100", ar100_parents,
+	    AR100_CFG_REG,	/* reg */
+	    __BITS(12,8),	/* prediv */
+	    __BIT(2),		/* prediv_sel */
+	    __BITS(5,4),	/* div */
+	    __BITS(17,16),	/* sel */
+	    SUNXI_CCU_PREDIV_POWER_OF_TWO),
+
+	SUNXI_CCU_FIXED_FACTOR(H3_R_CLK_AHB0, "ahb0", "ar100", 1, 1),
+
+	SUNXI_CCU_DIV(H3_R_CLK_APB0, "apb0", apb0_parents,
+	    APB0_CFG_REG,	/* reg */
+	    __BITS(1,0),	/* div */
+	    0,			/* sel */
+	    SUNXI_CCU_DIV_POWER_OF_TWO),
+
+	SUNXI_CCU_GATE(H3_R_CLK_APB0_PIO, "apb0-pio", "apb0",
+	    APB0_GATE_REG, 0),
+	SUNXI_CCU_GATE(H3_R_CLK_APB0_IR, "apb0-ir", "apb0",
+	    APB0_GATE_REG, 1),
+	SUNXI_CCU_GATE(H3_R_CLK_APB0_TIMER, "apb0-timer", "apb0",
+	    APB0_GATE_REG, 2),
+	SUNXI_CCU_GATE(H3_R_CLK_APB0_UART, "apb0-uart", "apb0",
+	    APB0_GATE_REG, 4),
+	SUNXI_CCU_GATE(H3_R_CLK_APB0_I2C, "apb0-i2c", "apb0",
+	    APB0_GATE_REG, 6),
+};
+
+static int
+sun8i_h3_r_ccu_match(device_t parent, cfdata_t cf, void *aux)
+{
+	struct fdt_attach_args * const faa = aux;
+
+	return of_match_compatible(faa->faa_phandle, compatible);
+}
+
+static void
+sun8i_h3_r_ccu_attach(device_t parent, device_t self, void *aux)
+{
+	struct sunxi_ccu_softc * const sc = device_private(self);
+	struct fdt_attach_args * const faa = aux;
+
+	sc->sc_dev = self;
+	sc->sc_phandle = faa->faa_phandle;
+	sc->sc_bst = faa->faa_bst;
+
+	sc->sc_resets = sun8i_h3_r_ccu_resets;
+	sc->sc_nresets = __arraycount(sun8i_h3_r_ccu_resets);
+
+	sc->sc_clks = sun8i_h3_r_ccu_clks;
+	sc->sc_nclks = __arraycount(sun8i_h3_r_ccu_clks);
+
+	if (sunxi_ccu_attach(sc) != 0)
+		return;
+
+	aprint_naive("\n");
+	aprint_normal(": H3 PRCM CCU\n");
+
+	sunxi_ccu_print(sc);
+}
Index: src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.h
diff -u /dev/null src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.h:1.1
--- /dev/null	Sat Sep 30 12:48:58 2017
+++ src/sys/arch/arm/sunxi/sun8i_h3_r_ccu.h	Sat Sep 30 12:48:58 2017
@@ -0,0 +1,50 @@
+/* $NetBSD: sun8i_h3_r_ccu.h,v 1.1 2017/09/30 12:48:58 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _ARM_SUN8I_H3_R_CCU_H
+#define _ARM_SUN8I_H3_R_CCU_H
+
+#define	H3_R_RST_APB0_IR		0
+#define	H3_R_RST_APB0_TIMER		1
+#define	H3_R_RST_APB0_RSB		2
+#define	H3_R_RST_APB0_UART		3
+#define	H3_R_RST_APB0_I2C		5
+
+#define	H3_R_CLK_AR100			0
+#define	H3_R_CLK_AHB0			1
+#define	H3_R_CLK_APB0			2
+#define	H3_R_CLK_APB0_PIO		3
+#define	H3_R_CLK_APB0_IR		4
+#define	H3_R_CLK_APB0_TIMER		5
+#define	H3_R_CLK_APB0_RSB		6
+#define	H3_R_CLK_APB0_UART		7
+#define	H3_R_CLK_APB0_I2C		9
+#define	H3_R_CLK_APB0_TWD		10
+#define	H3_R_CLK_IR			11
+
+#endif /* _ARM_SUN8I_H3_R_CCU_H */
Index: src/sys/arch/arm/sunxi/sunxi_ccu_fixed_factor.c
diff -u /dev/null src/sys/arch/arm/sunxi/sunxi_ccu_fixed_factor.c:1.1
--- /dev/null	Sat Sep 30 12:48:58 2017
+++ src/sys/arch/arm/sunxi/sunxi_ccu_fixed_factor.c	Sat Sep 30 12:48:58 2017
@@ -0,0 +1,76 @@
+/* $NetBSD: sunxi_ccu_fixed_factor.c,v 1.1 2017/09/30 12:48:58 jmcneill Exp $ */
+
+/*-
+ * Copyright (c) 2017 Jared McNeill <jmcne...@invisible.ca>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: sunxi_ccu_fixed_factor.c,v 1.1 2017/09/30 12:48:58 jmcneill Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+
+#include <dev/clk/clk_backend.h>
+
+#include <arm/sunxi/sunxi_ccu.h>
+
+static u_int
+sunxi_ccu_fixed_factor_get_parent_rate(struct clk *clkp)
+{
+	struct clk *clkp_parent;
+
+	clkp_parent = clk_get_parent(clkp);
+	if (clkp_parent == NULL)
+		return 0;
+
+	return clk_get_rate(clkp_parent);
+}
+
+u_int
+sunxi_ccu_fixed_factor_get_rate(struct sunxi_ccu_softc *sc,
+    struct sunxi_ccu_clk *clk)
+{
+	struct sunxi_ccu_fixed_factor *fixed_factor = &clk->u.fixed_factor;
+	struct clk *clkp = &clk->base;
+
+	KASSERT(clk->type == SUNXI_CCU_FIXED_FACTOR);
+
+	const u_int p_rate = sunxi_ccu_fixed_factor_get_parent_rate(clkp);
+	if (p_rate == 0)
+		return 0;
+
+	return (u_int)(((uint64_t)p_rate * fixed_factor->mult) / fixed_factor->div);
+}
+
+const char *
+sunxi_ccu_fixed_factor_get_parent(struct sunxi_ccu_softc *sc,
+    struct sunxi_ccu_clk *clk)
+{
+	struct sunxi_ccu_fixed_factor *fixed_factor = &clk->u.fixed_factor;
+
+	KASSERT(clk->type == SUNXI_CCU_FIXED_FACTOR);
+
+	return fixed_factor->parent;
+}

Reply via email to