Module Name: src Committed By: aymeric Date: Sun Oct 14 18:55:41 UTC 2018
Modified Files:
src/sys/arch/arm/dts: socfpga_cyclone5_de0_sockit.dts
Log Message:
Add reset information for first watchdog timer
To generate a diff of this commit:
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/dts/socfpga_cyclone5_de0_sockit.dts
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
