CVSROOT: /cvs
Module name: src
Changes by: [email protected] 2022/10/21 15:26:49
Modified files:
sys/arch/macppc/macppc: machdep.c
sys/arch/macppc/stand: Locore.c cache.c libsa.h
sys/arch/powerpc/include: cpu.h
sys/arch/powerpc64/powerpc64: syncicache.c
Log message:
Change len in syncicache(_, len) from int to size_t
The powerpc64 part is under #if 0, so this change affects only macppc.
Simplify powerpc64's __syncicache (which had size_t len) and copy it
to macppc's syncicache (which had int len).
macppc was looping while ((l -= CACHELINESIZE) > 0). The loop would
be infinite if l became an unsigned type like size_t. It is simpler
to set size_t i = 0, do i += by, and loop while (i < len). It helps
that dcbst and icbi can add 2 registers, from + i.
