CVSROOT: /cvs Module name: src Changes by: [email protected] 2013/06/05 16:48:21
Modified files:
lib/libc/arch/m88k/gen: divsi3.S modsi3.S udivsi3.S umodsi3.S
Log message:
On second thought, do not use a tcnd instruction to test for divide-by-zero,
as it forces a pipeline synchronization; replace it with a bcnd + unconditional
trap, to only synchronize when the trap is needed.
