* Thierry Reding wrote:
> This patch adds a platform device driver that supports the OpenCores SPI
> controller.
>
> The driver expects two resources: an IORESOURCE_MEM resource defining the
> core's memory-mapped registers and an IORESOURCE_IRQ for the associated
> interrupt. It also requires a clock, "spi-master-clk", used to compute the
> clock divider.
>
> Signed-off-by: Thierry Reding <thierry.red...@avionic-design.de>
[snip]
This second version is pretty much a rewrite. Some notes about the most
important changes:
* uses per-chip states to allow more slaves to use the controller
concurrently
* rejects invalid device configurations during setup
* rejects invalid per-message and per-transfer options
* queues messages so that they can be processed one after another
- this also provides for a way to handle power-management
* omits the spioc.h (and with it the platform data structure):
- uses the platform_device.id for the bus number
- always uses 8 chipselects because that's the maximum that the core
supports
I couldn't really find a way to implement per-transfer overrides for the
word size because the controller simply has no concept of word sizes. Is it
in such cases still necessary to hardwire the word size to 8 bits?
Thierry
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