On Tue, Feb 16, 2010 at 07:39:57PM +0100, Ernst Schwab wrote: > From: Ernst Schwab <[email protected]> > > Added devicetree binding documentation for gpios used as chipselect. The > code to evaluate these is already present in spi_mpc8xxx.c. > > Signed-off-by: Ernst Schwab <[email protected]> > --- > diff -upr a/Documentation/powerpc/dts-bindings/fsl/spi.txt > b/Documentation/powerpc/dts-bindings/fsl/spi.txt > --- a/Documentation/powerpc/dts-bindings/fsl/spi.txt > +++ b/Documentation/powerpc/dts-bindings/fsl/spi.txt > @@ -13,6 +13,11 @@ Required properties: > - interrupt-parent : the phandle for the interrupt controller that > services interrupts for this device. > > +Optional properties: > +- gpios : specifies the gpio pins to be used for chipselects. > + The gpios will be referred to as reg=<index> in the SPI child nodes. > + If unspecified, a single SPI device without a chip select can be used.
Minor: I'd prefer spaces around the '='.
> +
> Example:
> s...@4c0 {
> cell-index = <0>;
> @@ -21,4 +26,6 @@ Example:
> interrupts = <82 0>;
> interrupt-parent = <700>;
> mode = "cpu";
> + gpios = <&gpio 18 1 // device reg=<0>, low-active
> + &gpio 19 1>; // device reg=<1>, low-active
I'd drop the comments. GPIO controllers may have private xlate-functions, so
'1' could theoretically mean something else than "low-active" (although in
practice it hopefully won't).
> };
>
>
> _______________________________________________
> devicetree-discuss mailing list
> [email protected]
> https://lists.ozlabs.org/listinfo/devicetree-discuss
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