OK, here is my latest TBOOT log. It looks like we did get an error code
(TXT.ERRORCODE: 0xc0007051) this time around:

TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: *********************** TBOOT ***********************
TBOOT:    2019-04-10 11:00 +0200 1.9.10
TBOOT: *****************************************************
TBOOT: command line: logging=serial,memory
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: BSP is cpu 0
TBOOT: original e820 map:
TBOOT:  0000000000000000 - 0000000000058000  (1)
TBOOT:  0000000000058000 - 0000000000059000  (2)
TBOOT:  0000000000059000 - 000000000009e000  (1)
TBOOT:  000000000009e000 - 0000000000100000  (2)
TBOOT:  0000000000100000 - 000000005d4e1000  (1)
TBOOT:  000000005d4e1000 - 000000005d4e2000  (4)
TBOOT:  000000005d4e2000 - 000000005d4e3000  (2)
TBOOT:  000000005d4e3000 - 000000005ef88000  (1)
TBOOT:  000000005ef88000 - 000000005f888000  (2)
TBOOT:  000000005f888000 - 0000000075a9f000  (1)
TBOOT:  0000000075a9f000 - 0000000075c9f000  (20)
TBOOT:  0000000075c9f000 - 000000007648f000  (2)
TBOOT:  000000007648f000 - 0000000076b7f000  (4)
TBOOT:  0000000076b7f000 - 0000000076bff000  (3)
TBOOT:  0000000076bff000 - 0000000076c00000  (1)
TBOOT:  0000000076c00000 - 0000000080000000  (2)
TBOOT:  00000000e0000000 - 00000000f0000000  (2)
TBOOT:  00000000fd000000 - 00000000fe800000  (2)
TBOOT:  00000000fec00000 - 00000000fec01000  (2)
TBOOT:  00000000fed00000 - 00000000fed01000  (2)
TBOOT:  00000000fed10000 - 00000000fed1a000  (2)
TBOOT:  00000000fed20000 - 00000000fed80000  (2)
TBOOT:  00000000fed84000 - 00000000fed85000  (2)
TBOOT:  00000000fee00000 - 00000000fee01000  (2)
TBOOT:  00000000ff900000 - 0000000100000000  (2)
TBOOT:  0000000100000000 - 000000047e000000  (1)
TBOOT: checking if module  is an SINIT for this platform...
TBOOT: chipset production fused: 1
TBOOT: chipset ids: vendor: 0x8086, device: 0xb006, revision: 0x1
TBOOT: processor family/model/stepping: 0x806ea
TBOOT: platform id: 0x1c000000000000
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0xc002, flags: 0x1, revision: 0x7,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0xa000, flags: 0x1, revision: 0x1,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0xc000, flags: 0x1, revision: 0x3f,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0xc000, flags: 0x1, revision: 0x7,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0x8003, flags: 0x1, revision: 0xf,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0x8001, flags: 0x1, revision: 0x7,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0x9000, flags: 0x1, revision: 0x3f,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   ACM info_table version mismatch (6)
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0xb008, flags: 0x1, revision: 0x1,
extended: 0x0
TBOOT:   chipset id mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   ACM info_table version mismatch (6)
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0xb006, flags: 0x1, revision: 0x1,
extended: 0x0
TBOOT:   2 ACM processor id entries:
TBOOT:       fms: 0x406e0, fms_mask: 0xfff3ff0, platform_id: 0x0,
platform_mask: 0x0
TBOOT:       fms: 0x506e0, fms_mask: 0xfff3ff0, platform_id: 0x0,
platform_mask: 0x0
TBOOT:   processor mismatch
TBOOT: checking if module  is an SINIT for this platform...
TBOOT:   ACM info_table version mismatch (6)
TBOOT:   1 ACM chipset id entries:
TBOOT:       vendor: 0x8086, device: 0xb006, flags: 0x1, revision: 0x1,
extended: 0x0
TBOOT:   4 ACM processor id entries:
TBOOT:       fms: 0x406e0, fms_mask: 0xfff3ff0, platform_id: 0x0,
platform_mask: 0x0
TBOOT:       fms: 0x506e0, fms_mask: 0xfff3ff0, platform_id: 0x0,
platform_mask: 0x0
TBOOT:       fms: 0x806e0, fms_mask: 0xfff3ff0, platform_id: 0x0,
platform_mask: 0x0
TBOOT: SINIT matches platform
TBOOT: TXT.SINIT.BASE: 0x76ed0000
TBOOT: TXT.SINIT.SIZE: 0x50000 (327680)
TBOOT: copied SINIT (size=20000) to 0x76ed0000
TBOOT: AC mod base alignment OK
TBOOT: AC mod size OK
TBOOT: AC module header dump for SINIT:
TBOOT:   type: 0x2 (ACM_TYPE_CHIPSET)
TBOOT:   subtype: 0x0 
TBOOT:   length: 0xa1 (161)
TBOOT:   version: 0
TBOOT:   chipset_id: 0xb006
TBOOT:   flags: 0x0
TBOOT:           pre_production: 0
TBOOT:           debug_signed: 0
TBOOT:   vendor: 0x8086
TBOOT:   date: 0x20180904
TBOOT:   size*4: 0x20000 (131072)
TBOOT:   txt_svn: 0x00000000
TBOOT:   se_svn: 0x00000004
TBOOT:   code_control: 0x0
TBOOT:   entry point: 0x00000008:0000e418
TBOOT:   scratch_size: 0x8f (143)
TBOOT:   info_table:
TBOOT:           uuid: {0x7fc03aaa, 0x46a7, 0x18db, 0xac2e,
                {0x69, 0x8f, 0x8d, 0x41, 0x7f, 0x5a}}
TBOOT:               ACM_UUID_V3
TBOOT:           chipset_acm_type: 0x1 (SINIT)
TBOOT:           version: 6
TBOOT:           length: 0x30 (48)
TBOOT:           chipset_id_list: 0x4f0
TBOOT:           os_sinit_data_ver: 0x7
TBOOT:           min_mle_hdr_ver: 0x00020000
TBOOT:           capabilities: 0x0000036e
TBOOT:               rlp_wake_getsec: 0
TBOOT:               rlp_wake_monitor: 1
TBOOT:               ecx_pgtbl: 1
TBOOT:               stm: 1
TBOOT:               pcr_map_no_legacy: 0
TBOOT:               pcr_map_da: 1
TBOOT:               platform_type: 1
TBOOT:               max_phy_addr: 1
TBOOT:               tcg_event_log_format: 1
TBOOT:           acm_ver: 171
TBOOT:   chipset list:
TBOOT:           count: 1
TBOOT:           entry 0:
TBOOT:               flags: 0x1
TBOOT:               vendor_id: 0x8086
TBOOT:               device_id: 0xb006
TBOOT:               revision_id: 0x1
TBOOT:               extended_id: 0x0
TBOOT:   processor list:
TBOOT:           count: 4
TBOOT:           entry 0:
TBOOT:               fms: 0x406e0
TBOOT:               fms_mask: 0xfff3ff0
TBOOT:               platform_id: 0x0
TBOOT:               platform_mask: 0x0
TBOOT:           entry 1:
TBOOT:               fms: 0x506e0
TBOOT:               fms_mask: 0xfff3ff0
TBOOT:               platform_id: 0x0
TBOOT:               platform_mask: 0x0
TBOOT:           entry 2:
TBOOT:               fms: 0x806e0
TBOOT:               fms_mask: 0xfff3ff0
TBOOT:               platform_id: 0x0
TBOOT:               platform_mask: 0x0
TBOOT:           entry 3:
TBOOT:               fms: 0x906e0
TBOOT:               fms_mask: 0xfff3ff0
TBOOT:               platform_id: 0x0
TBOOT:               platform_mask: 0x0
TBOOT:   TPM info list:
TBOOT:           TPM capability:
TBOOT:                ext_policy: 0x3
TBOOT:                tpm_family : 0x3
TBOOT:                tpm_nv_index_set : 0x0
TBOOT:           alg count: 6
TBOOT:               alg_id: 0x4
TBOOT:               alg_id: 0xb
TBOOT:               alg_id: 0xc
TBOOT:               alg_id: 0xd
TBOOT:               alg_id: 0x14
TBOOT:               alg_id: 0x18
TBOOT: TPM: TPM 2.0 FIFO interface is active...
TBOOT: TPM: FIFO_INF Locality 0 is open
TBOOT: TPM: discrete TPM2.0 Family 0x1
TBOOT: TPM: supported bank count = 2
TBOOT: TPM: bank alg = 00000004
TBOOT: TPM: bank alg = 0000000b
TBOOT: tboot: supported alg count = 2
TBOOT: tboot: hash alg = 00000004
TBOOT: tboot: hash alg = 0000000B
TBOOT: TPM:CreatePrimary creating hierarchy handle = 40000007
TBOOT: TPM:CreatePrimary created object handle = 80000000
TBOOT: TPM attribute:
TBOOT:   extend policy: 2
TBOOT:   current alg id: 0x4
TBOOT:   timeout values: A: 750, B: 2000, C: 75000, D: 750
TBOOT: SGX:verify_IA32_se_svn_status is called
TBOOT: SGX is enabled, cpuid.ebx:0x29c6fbf
TBOOT: Comparing se_svn with ACM Header se_svn
TBOOT: se_svn is equal to ACM se_svn
TBOOT: reading Verified Launch Policy from TPM NV...
TBOOT: TPM: fail to get public data of 0x01200001 in TPM NV
TBOOT:  :reading failed
TBOOT: reading Launch Control Policy from TPM NV...
TBOOT: TPM: fail to get public data of 0x01400001 in TPM NV
TBOOT:  :reading failed
TBOOT: failed to read policy from TPM NV, using default
TBOOT: policy:
TBOOT:   version: 2
TBOOT:   policy_type: TB_POLTYPE_CONT_NON_FATAL
TBOOT:   hash_alg: TB_HALG_SHA1
TBOOT:   policy_control: 00000001 (EXTEND_PCR17)
TBOOT:   num_entries: 3
TBOOT:   policy entry[0]:
TBOOT:           mod_num: 0
TBOOT:           pcr: none
TBOOT:           hash_type: TB_HTYPE_ANY
TBOOT:           num_hashes: 0
TBOOT:   policy entry[1]:
TBOOT:           mod_num: any
TBOOT:           pcr: 19
TBOOT:           hash_type: TB_HTYPE_ANY
TBOOT:           num_hashes: 0
TBOOT:   policy entry[2]:
TBOOT:           mod_num: nv_raw
                 nv_index: 40000010
TBOOT:           pcr: 22
TBOOT:           hash_type: TB_HTYPE_ANY
TBOOT:           num_hashes: 0
TBOOT: no policy in TPM NV.
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.ERRORCODE: 0xc0007051
TBOOT: AC module error : acm_type=0x1, progress=0x05, error=0x1c
TBOOT: TXT.ESTS: 0x0
TBOOT: TXT.E2STS: 0xc
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: TXT.HEAP.BASE: 0x76f20000
TBOOT: TXT.HEAP.SIZE: 0xe0000 (917504)
TBOOT: unsupported BIOS data version (6)
TBOOT: bios_data (@0x76f20008, 0x56):
TBOOT:   version: 6
TBOOT:   bios_sinit_size: 0x0 (0)
TBOOT:   lcp_pd_base: 0x0
TBOOT:   lcp_pd_size: 0x0 (0)
TBOOT:   num_logical_procs: 8
TBOOT:   flags: 0x200000000
TBOOT:   ext_data_elts[]:
TBOOT:           BIOS_SPEC_VER:
TBOOT:               major: 0x2
TBOOT:               minor: 0x1
TBOOT:               rev: 0x0
TBOOT:           ACM:
TBOOT:               num_acms: 1
TBOOT:               acm_addrs[0]: 0xffe42000
TBOOT: IA32_FEATURE_CONTROL_MSR: 0000ff07
TBOOT: CPU is SMX-capable
TBOOT: CPU is VMX-capable
TBOOT: SMX is enabled
TBOOT: TXT chipset and all needed capabilities present
TBOOT: CR0 and EFLAGS OK
TBOOT: supports preserving machine check errors
TBOOT: CPU support processor-based S-CRTM
TBOOT: CPU is ready for SENTER
TBOOT: checking previous errors on the last boot.
        last boot has error.
TBOOT: TPM: TPM 2.0 FIFO interface is active...
TBOOT: file addresses:
TBOOT:   &_start=0x804000
TBOOT:   &_end=0xb57ca0
TBOOT:   &_mle_start=0x804000
TBOOT:   &_mle_end=0x83b000
TBOOT:   &_post_launch_entry=0x804010
TBOOT:   &_txt_wakeup=0x804200
TBOOT:   &g_mle_hdr=0x81e960
TBOOT: MLE header:
TBOOT:   uuid={0x9082ac5a, 0x476f, 0x74a7, 0x5c0f,
                {0x55, 0xa2, 0xcb, 0x51, 0xb6, 0x42}}
TBOOT:   length=34
TBOOT:   version=00020001
TBOOT:   entry_point=00000010
TBOOT:   first_valid_page=00000000
TBOOT:   mle_start_off=4000
TBOOT:   mle_end_off=3b000
TBOOT:   capabilities: 0x00000227
TBOOT:       rlp_wake_getsec: 1
TBOOT:       rlp_wake_monitor: 1
TBOOT:       ecx_pgtbl: 1
TBOOT:       stm: 0
TBOOT:       pcr_map_no_legacy: 0
TBOOT:       pcr_map_da: 1
TBOOT:       platform_type: 0
TBOOT:       max_phy_addr: 0
TBOOT:       tcg_event_log_format: 1
TBOOT: MLE start=0x804000, end=0x83b000, size=0x37000
TBOOT: ptab_size=3000, ptab_base=0x801000
TBOOT: TXT.HEAP.BASE: 0x76f20000
TBOOT: TXT.HEAP.SIZE: 0xe0000 (917504)
TBOOT: unsupported BIOS data version (6)
TBOOT: bios_data (@0x76f20008, 0x56):
TBOOT:   version: 6
TBOOT:   bios_sinit_size: 0x0 (0)
TBOOT:   lcp_pd_base: 0x0
TBOOT:   lcp_pd_size: 0x0 (0)
TBOOT:   num_logical_procs: 8
TBOOT:   flags: 0x200000000
TBOOT:   ext_data_elts[]:
TBOOT:           BIOS_SPEC_VER:
TBOOT:               major: 0x2
TBOOT:               minor: 0x1
TBOOT:               rev: 0x0
TBOOT:           ACM:
TBOOT:               num_acms: 1
TBOOT:               acm_addrs[0]: 0xffe42000
TBOOT: discarding RAM above reserved regions: 0x5d4e3000 - 0x5ef88000
TBOOT: discarding RAM above reserved regions: 0x5f888000 - 0x75a9f000
TBOOT: discarding RAM above reserved regions: 0x76bff000 - 0x76c00000
TBOOT: min_lo_ram: 0x0, max_lo_ram: 0x5d4e1000
TBOOT: min_hi_ram: 0x100000000, max_hi_ram: 0x47e000000
TBOOT: no LCP module found
TBOOT: SINIT ACM supports TCG compliant TPM 2.0 event log format,
tcg_event_log_format = 1 
TBOOT: TCG compliant TPM 2.0 event log descriptor:
TBOOT:   phys_addr = 0x76F30176
TBOOT:   allcoated_event_container_size = 0x2000 
TBOOT:   first_record_offset = 0x0 
TBOOT:   next_record_offset = 0x0 
TBOOT: heap_ext_data_element TYPE = 8 
TBOOT: heap_ext_data_element SIZE = 28 
TBOOT: os_sinit_data (@0x76f3517e, 0x88):
TBOOT:   version: 7
TBOOT:   flags: 1
TBOOT:   mle_ptab: 0x801000
TBOOT:   mle_size: 0x37000 (225280)
TBOOT:   mle_hdr_base: 0x1a960
TBOOT:   vtd_pmr_lo_base: 0x0
TBOOT:   vtd_pmr_lo_size: 0x5d400000
TBOOT:   vtd_pmr_hi_base: 0x100000000
TBOOT:   vtd_pmr_hi_size: 0x37e000000
TBOOT:   lcp_po_base: 0x0
TBOOT:   lcp_po_size: 0x0 (0)
TBOOT:   capabilities: 0x00000202
TBOOT:       rlp_wake_getsec: 0
TBOOT:       rlp_wake_monitor: 1
TBOOT:       ecx_pgtbl: 0
TBOOT:       stm: 0
TBOOT:       pcr_map_no_legacy: 0
TBOOT:       pcr_map_da: 0
TBOOT:       platform_type: 0
TBOOT:       max_phy_addr: 0
TBOOT:       tcg_event_log_format: 1
TBOOT:   efi_rsdt_ptr: 0x83fe00
TBOOT:   ext_data_elts[]:
TBOOT:   TCG EVENT_LOG_PTR:
TBOOT:                 type: 8
TBOOT:                 size: 28
TBOOT:   TCG Event Log Descrption:
TBOOT:       allcoated_event_container_size: 8192
TBOOT:                         EventsOffset: [0,0]
TBOOT:                   No Event Log found.
TBOOT: setting MTRRs for acmod: base=0x76ed0000, size=0x20000, num_pages=32
TBOOT: The maximum allowed MTRR range size=16 Pages 
TBOOT: executing GETSEC[SENTER]...

-----Original Message-----
From: Haskins, Robert (US N-INCADENCE STRATEGIC SOLUTIONS CORPORATION) 
Sent: Monday, September 9, 2019 9:40 AM
To: 'g...@idfusion.net' <g...@idfusion.net>
Cc: 'tboot-devel@lists.sourceforge.net' <tboot-devel@lists.sourceforge.net>
Subject: RE: EXTERNAL: Re: [tboot-devel] GETSEC[SENTER]....and then reset

Thanks for your response! My responses are here:

1) We do have serial logging setup and working. I will work to get the logs
off the machine.
2) The platform is TPM2.
3) I am not sure what you mean by this question. Are you referring to index
0x1c10103? (see https://sourceforge.net/p/tboot/mailman/message/35551544/)
4) We are not implementing any launch control policy.

Thank you for your help!

-----Original Message-----
From: Dr. Greg <g...@idfusion.net> 
Sent: Saturday, September 7, 2019 5:33 PM
To: Haskins, Robert (US N-INCADENCE STRATEGIC SOLUTIONS CORPORATION)
<robert.hask...@lmco.com>
Cc: tboot-devel@lists.sourceforge.net
Subject: EXTERNAL: Re: [tboot-devel] GETSEC[SENTER]....and then reset

On Tue, Sep 03, 2019 at 08:37:06PM +0000, Haskins, Robert wrote:

Good afternoon Robert, I hope your weekend is going well.

> I have a Getac S410 G2 that I am trying to get TBOOT working on under 
> a vanilla RHEL 7.6 O/S with TBOOT 1.9.10. The TBOOT startup looks fine:
> 
> TXT.ERRCODE: 0x0
> 
> SINIT match on "the 6th_7th_gen_i5_i7-SINIT_79.bin" file
> 
> "last boot has no error"
> 
> Once it gets to GETSEC[SENTER], it just resets back to grub/startup
screen.
> 
> What am I doing wrong?

It could be a plethora of things.

It would be helpful to have logs from the first phase execution of tboot.
Since tboot is generating a hard platform reset you will need serial logging
or something else to capture the logs unless you are able to get memory
based logging to work.

Is the platform TPM1 or TPM2?  Given it is i6/i7 I'm assuming the latter.

Are the required TPM NVRAM locations configured?

Are you attempting to implement any type of launch control policy?

Logs and answers to the above questions should help get a conversation
started.

Have a good evening.

Dr. Greg

As always,
Dr. Greg Wettstein, Ph.D, Worker
IDfusion, LLC               SGX secured infrastructure and
4206 N. 19th Ave.           autonomously self-defensive platforms.
Fargo, ND  58102
PH: 701-281-1686            EMAIL: g...@idfusion.net
----------------------------------------------------------------------------
--
"Sweeny's Law: The length of a progress report is inversely proportional  to
the amount of progress."

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