On 20.05.10 01:15, David Young wrote: > On Wed, May 19, 2010 at 11:43:00AM +0200, Christoph Egger wrote: >> The following memory types exist: >> >> - Uncacheable (UC) >> - Write-Combining (WC) >> - Write-Protect (WP) >> - Write-Through (WT) >> - Writeback (WB) >> - Uncacheable Minus (UC-) > > IIUC, the memory type set by PAT applies at VA -> PA mapping.
Yes, because it works on page-level. > Can't one physical page be mapped at two VAs with conflicting memory types? > > On one physical range, can PAT and MTRR simultaneously set conflicting > memory types? Can we detect/avoid the conflict? The memory types established by the PAT mechanism can be combined with MTRR-established memory types to form an effective memory-type. Reserved and undefined combinations of MTRR and PAT memory types result in undefined behavior. If the MTRRs are disabled in implementations that support the MTRR mechanism, the default memory type is set to Uncacheable. The combined effect of MTRR and PAT memory types: PAT memory type MTRR memory type effective memory type UC UC, WC, WP, WT, WB UC UC- UC UC UC- WC WC UC- WP, WT, WB UC WC — WC WP UC UC WP WC UC WP WP WP WP WT UC WP WB WP WT UC UC WT WC, WP UC WT WT, WB WT WB UC UC WB WC WC WB WP WP WB WT WT WB WB WB > Are some memory types more suitable for a DMA buffer than others? For MMIO you can use either Uncachable, Uncacheable Minus or Write-Combine. > Where PAT is not available, can't we fall back to using a facility such > as MTRR to set memory types? Sure we can. > > Dave >
