> Hadn't it been much nicer of we just had the mutex and lock > abstraction, and left the whole implementation to each MD part?
Exactly. Consider this hypothetical: x86 does #define ATOMIC_OPS_USE_CAS and defines a CAS(); MI code notices this and defines all the higher-level primitives (if that's not too much of an oxymoron) in terms of CAS(). ppc, arm, all the arches sufficiently "modern" to have CAS, likewise. Arches without a sufficiently general CAS[%] do not define ATOMIC_OPS_USE_CAS and provides their own implementations of mutexes, spinlocks, whatever. That seems to me like a mostly sane way to do it. If I can come up with it in thirty seconds, it seems likely anyone capable of doing such overhauls could come up with it. Instead, all arches must implement a fully-general CAS. Seems to me like a lose. [%] It occurs to me, the VAX's BBSSI and BBCCI _are_ CAS, just restricted to a one-bit-wide operand (and with the data-to-swap-in specified by choice of instruction rather than an operand). /~\ The ASCII Mouse \ / Ribbon Campaign X Against HTML mo...@rodents-montreal.org / \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B
