On Thu, 2 Dec 2010, Izumi Tsutsui wrote: > > What swap is done by what hardware? > > Some bus masters like bnx(4) and epic(4) treat host's memory > as BE if it's configured so. No byteswap against DMA descripters > is necessary in the driver in such case. > > Using two uint16_t members against a uint32_t descripter requires > extra ifdefs to switch BE and LE environments as bitfield in structure.
Ah, I see. Adding byte swapping to the DMA engine never works right. HW engineers are wacky. > > > Sigh. I really need to get off my butt and add a bunch of bus_dma > > accessors (like the bus_space ones but for DMA buffers) to solve this > > problem optimally across all architectures. > > I guess you are thinking about extra support for bus controller > that supports byteswap ops, not individual bus masters. Actually, things get a lot more complicated than that based on the hardware in question. Byte swapping can happen in lots of different places: 1 In registers (using things like the bswap instruction in x86) 2 In load/store instructions (PowerPC special LE load/store instructions) 3 In the MMU (UltraSPARCs can have a bit set in the PTE to swap the endianness of a page) 4 Bus controllers (haven't seen this one yet, but I'm sure you can do it) 5 The DMA engine (as above) 6 The device itself (This differs from #5 in that the device can issue sub-word accesses with the correct endiannes) When DMA memory is allocated or a DMA mapping is set up a negotiation must be done between the different layers to determine what the most efficient way to configure the system for a specific device. And don't forget the cache sync issues involved in accessing DMA memory. We're currently using an axe where a scalpel is probably more appropriate. Eduardo