On Mon, 15 Nov 2021 08:43:37 -0800
Jason Thorpe <thor...@me.com> wrote:

> > On Nov 15, 2021, at 8:32 AM, Michael <macal...@netbsd.org> wrote:
> > 
> > IIRC on macppc SMP startup we stop the timebase, then zero the counters
> > on all CPUs while they hatch, then start the timebase again.  
> 
> But that's for the clock interrupt, right?  The time counter thing isn't 
> about clock interrupts.

I meant the external clock driving both decrementer ( for timer
interrupts ) and the time base, for timecounters.
On G5 we have to set an extra HID bit to use the external clock and not
1/16 core clock...

have fun
Michael

Reply via email to