This is the first step into moving the glxpcib driver into MI land.
The following diff brings the loongson and i386 drivers as close
together as possible. The only difference after applying the diff are
some defines which are already handled properly (from an MI point of
view) in loongson/dev/glxreg.h.
So once this gets in we can move that header into MI land as well and
have the same driver for both architectures -- this is step two of
course.
Please test and comment.
Index: i386/pci/glxpcib.c
===================================================================
RCS file: /cvs/src/sys/arch/i386/pci/glxpcib.c,v
retrieving revision 1.13
diff -u -p -r1.13 glxpcib.c
--- i386/pci/glxpcib.c 24 Sep 2010 10:30:29 -0000 1.13
+++ i386/pci/glxpcib.c 28 Sep 2010 18:35:55 -0000
@@ -24,12 +24,15 @@
#include <sys/param.h>
#include <sys/systm.h>
+#include <sys/proc.h>
#include <sys/device.h>
#include <sys/gpio.h>
#include <sys/timetc.h>
#include <machine/bus.h>
+#ifdef __i386__
#include <machine/cpufunc.h>
+#endif
#include <dev/gpio/gpiovar.h>
#include <dev/pci/pcireg.h>
@@ -125,6 +128,15 @@
#define AMD5536_GPIO_IN_INVRT_EN 0x24 /* invert input */
#define AMD5536_GPIO_READ_BACK 0x30 /* read back value */
+/*
+ * MSR registers we want to preserve accross suspend/resume
+ */
+const uint32_t glxpcib_msrlist[] = {
+ GLIU_PAE,
+ GLCP_GLD_MSR_PM,
+ DIVIL_BALL_OPTS
+};
+
struct glxpcib_softc {
struct device sc_dev;
@@ -132,7 +144,9 @@ struct glxpcib_softc {
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
-#ifndef SMALL_KERNEL
+ uint64_t sc_msrsave[nitems(glxpcib_msrlist)];
+
+#if !defined(SMALL_KERNEL) && NGPIO > 0
/* GPIO interface */
bus_space_tag_t sc_gpio_iot;
bus_space_handle_t sc_gpio_ioh;
@@ -160,12 +174,12 @@ struct cfattach glxpcib_ca = {
void pcibattach(struct device *parent, struct device *self, void *aux);
u_int glxpcib_get_timecount(struct timecounter *tc);
-#ifndef SMALL_KERNEL
-int glxpcib_wdogctl_cb(void *, int);
+#if !defined(SMALL_KERNEL) && NGPIO > 0
+void glxpcib_gpio_pin_ctl(void *, int, int);
int glxpcib_gpio_pin_read(void *, int);
void glxpcib_gpio_pin_write(void *, int, int);
-void glxpcib_gpio_pin_ctl(void *, int, int);
+int glxpcib_wdogctl_cb(void *, int);
#endif
const struct pci_matchid glxpcib_devices[] = {
@@ -176,8 +190,10 @@ int
glxpcib_match(struct device *parent, void *match, void *aux)
{
if (pci_matchbyid((struct pci_attach_args *)aux, glxpcib_devices,
- sizeof(glxpcib_devices) / sizeof(glxpcib_devices[0])))
+ nitems(glxpcib_devices))) {
+ /* needs to win over pcib */
return 2;
+ }
return 0;
}
@@ -187,18 +203,21 @@ glxpcib_attach(struct device *parent, st
{
struct glxpcib_softc *sc = (struct glxpcib_softc *)self;
struct timecounter *tc = &sc->sc_timecounter;
-#ifndef SMALL_KERNEL
- struct pci_attach_args *pa = aux;
+#ifndef !defined(SMALL_KERNEL) && NGPIO > 0
+ struct pci_attach_args *pa = (struct pci_attach_args *)aux;
u_int64_t wa, ga;
struct gpiobus_attach_args gba;
int i, gpio = 0;
#endif
-
tc->tc_get_timecount = glxpcib_get_timecount;
tc->tc_counter_mask = 0xffffffff;
tc->tc_frequency = 3579545;
tc->tc_name = "CS5536";
+#ifdef __loongson__
+ tc->tc_quality = 0;
+#else
tc->tc_quality = 1000;
+#endif
tc->tc_priv = sc;
tc_init(tc);
@@ -206,14 +225,13 @@ glxpcib_attach(struct device *parent, st
(int)rdmsr(AMD5536_REV) & AMD5536_REV_MASK,
tc->tc_frequency);
-#ifndef SMALL_KERNEL
+#if !defined(SMALL_KERNEL) && NGPIO > 0
/* Attach the watchdog timer */
sc->sc_iot = pa->pa_iot;
wa = rdmsr(MSR_LBAR_MFGPT);
if (wa & MSR_LBAR_ENABLE &&
!bus_space_map(sc->sc_iot, wa & MSR_MFGPT_ADDR_MASK,
MSR_MFGPT_SIZE, 0, &sc->sc_ioh)) {
-
/* count in seconds (as upper level desires) */
bus_space_write_2(sc->sc_iot, sc->sc_ioh, AMD5536_MFGPT0_SETUP,
AMD5536_MFGPT_CNT_EN | AMD5536_MFGPT_CMP2EV |
@@ -259,7 +277,8 @@ glxpcib_attach(struct device *parent, st
}
#endif
pcibattach(parent, self, aux);
-#ifndef SMALL_KERNEL
+
+#if !defined(SMALL_KERNEL) && NGPIO > 0
if (gpio)
config_found(&sc->sc_dev, &gba, gpiobus_print);
#endif
@@ -272,6 +291,7 @@ glxpcib_activate(struct device *self, in
struct glxpcib_softc *sc = (struct glxpcib_softc *)self;
#endif
int rv = 0;
+ uint i;
switch (act) {
case DVACT_QUIESCE:
@@ -286,12 +306,17 @@ glxpcib_activate(struct device *self, in
}
#endif
rv = config_activate_children(self, act);
+ for (i = 0; i < nitems(glxpcib_msrlist); i++)
+ sc->sc_msrsave[i] = rdmsr(glxpcib_msrlist[i]);
+
break;
case DVACT_RESUME:
#ifndef SMALL_KERNEL
if (sc->sc_wdog)
glxpcib_wdogctl_cb(sc, sc->sc_wdog_period);
#endif
+ for (i = 0; i < nitems(glxpcib_msrlist); i++)
+ wrmsr(glxpcib_msrlist[i], sc->sc_msrsave[i]);
rv = config_activate_children(self, act);
break;
}
@@ -304,7 +329,7 @@ glxpcib_get_timecount(struct timecounter
return rdmsr(AMD5536_TMC);
}
-#ifndef SMALL_KERNEL
+#if !defined(SMALL_KERNEL) && NGPIO > 0
int
glxpcib_wdogctl_cb(void *v, int period)
{
Index: loongson/dev/glxpcib.c
===================================================================
RCS file: /cvs/src/sys/arch/loongson/dev/glxpcib.c,v
retrieving revision 1.12
diff -u -p -r1.12 glxpcib.c
--- loongson/dev/glxpcib.c 24 Sep 2010 10:30:28 -0000 1.12
+++ loongson/dev/glxpcib.c 28 Sep 2010 18:35:56 -0000
@@ -1,4 +1,4 @@
-/* $OpenBSD: glxpcib.c,v 1.12 2010/09/24 10:30:28 pirofti Exp $ */
+/* $OpenBSD: glxpcib.c,v 1.11 2010/09/21 11:23:20 pirofti Exp $ */
/*
* Copyright (c) 2007 Marc Balmer <[email protected]>
@@ -30,6 +30,9 @@
#include <sys/timetc.h>
#include <machine/bus.h>
+#ifdef __i386__
+#include <machine/cpufunc.h>
+#endif
#include <dev/gpio/gpiovar.h>
#include <dev/pci/pcireg.h>
@@ -148,12 +151,13 @@ struct glxpcib_softc {
uint64_t sc_msrsave[nitems(glxpcib_msrlist)];
-#if NGPIO > 0
+#if !defined(SMALL_KERNEL) && NGPIO > 0
/* GPIO interface */
bus_space_tag_t sc_gpio_iot;
bus_space_handle_t sc_gpio_ioh;
struct gpio_chipset_tag sc_gpio_gc;
gpio_pin_t sc_gpio_pins[AMD5536_GPIO_NPINS];
+ int sc_wdog;
int sc_wdog_period;
#endif
};
@@ -176,7 +180,7 @@ void pcibattach(struct device *parent, s
u_int glxpcib_get_timecount(struct timecounter *tc);
-#if NGPIO > 0
+#if !defined(SMALL_KERNEL) && NGPIO > 0
void glxpcib_gpio_pin_ctl(void *, int, int);
int glxpcib_gpio_pin_read(void *, int);
void glxpcib_gpio_pin_write(void *, int, int);
@@ -204,15 +208,12 @@ glxpcib_attach(struct device *parent, st
{
struct glxpcib_softc *sc = (struct glxpcib_softc *)self;
struct timecounter *tc = &sc->sc_timecounter;
-#if NGPIO > 0
+#ifndef !defined(SMALL_KERNEL) && NGPIO > 0
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
u_int64_t wa, ga;
struct gpiobus_attach_args gba;
int i, gpio = 0;
#endif
-
- printf(": rev %d",
- (int)rdmsr(AMD5536_REV) & AMD5536_REV_MASK);
tc->tc_get_timecount = glxpcib_get_timecount;
tc->tc_counter_mask = 0xffffffff;
tc->tc_frequency = 3579545;
@@ -225,9 +226,11 @@ glxpcib_attach(struct device *parent, st
tc->tc_priv = sc;
tc_init(tc);
- printf(", 32-bit %lluHz timer", tc->tc_frequency);
+ printf(": rev %d, 32-bit %lluHz timer",
+ (int)rdmsr(AMD5536_REV) & AMD5536_REV_MASK,
+ tc->tc_frequency);
-#if NGPIO > 0
+#if !defined(SMALL_KERNEL) && NGPIO > 0
/* Attach the watchdog timer */
sc->sc_iot = pa->pa_iot;
wa = rdmsr(MSR_LBAR_MFGPT);
@@ -239,6 +242,7 @@ glxpcib_attach(struct device *parent, st
AMD5536_MFGPT_CNT_EN | AMD5536_MFGPT_CMP2EV |
AMD5536_MFGPT_CMP2 | AMD5536_MFGPT_DIV_MASK);
wdog_register(sc, glxpcib_wdogctl_cb);
+ sc->sc_wdog = 1;
printf(", watchdog");
}
@@ -279,7 +283,7 @@ glxpcib_attach(struct device *parent, st
#endif
pcibattach(parent, self, aux);
-#if NGPIO > 0
+#if !defined(SMALL_KERNEL) && NGPIO > 0
if (gpio)
config_found(&sc->sc_dev, &gba, gpiobus_print);
#endif
@@ -288,7 +292,9 @@ glxpcib_attach(struct device *parent, st
int
glxpcib_activate(struct device *self, int act)
{
+#ifndef SMALL_KERNEL
struct glxpcib_softc *sc = (struct glxpcib_softc *)self;
+#endif
int rv = 0;
uint i;
@@ -297,25 +303,29 @@ glxpcib_activate(struct device *self, in
rv = config_activate_children(self, act);
break;
case DVACT_SUSPEND:
+#ifndef SMALL_KERNEL
+ if (sc->sc_wdog) {
+ sc->sc_wdog_period = bus_space_read_2(sc->sc_iot,
+ sc->sc_ioh, AMD5536_MFGPT0_CMP2);
+ glxpcib_wdogctl_cb(sc, 0);
+ }
+#endif
rv = config_activate_children(self, act);
for (i = 0; i < nitems(glxpcib_msrlist); i++)
sc->sc_msrsave[i] = rdmsr(glxpcib_msrlist[i]);
- sc->sc_wdog_period = bus_space_read_2(sc->sc_iot, sc->sc_ioh,
- AMD5536_MFGPT0_CMP2);
- glxpcib_wdogctl_cb(sc, 0);
-
break;
case DVACT_RESUME:
- glxpcib_wdogctl_cb(sc, sc->sc_wdog_period);
-
+#ifndef SMALL_KERNEL
+ if (sc->sc_wdog)
+ glxpcib_wdogctl_cb(sc, sc->sc_wdog_period);
+#endif
for (i = 0; i < nitems(glxpcib_msrlist); i++)
wrmsr(glxpcib_msrlist[i], sc->sc_msrsave[i]);
rv = config_activate_children(self, act);
break;
}
-
- return rv;
+ return (rv);
}
u_int
@@ -324,7 +334,7 @@ glxpcib_get_timecount(struct timecounter
return rdmsr(AMD5536_TMC);
}
-#if NGPIO > 0
+#if !defined(SMALL_KERNEL) && NGPIO > 0
int
glxpcib_wdogctl_cb(void *v, int period)
{
