Oops obviously the bnx bit is not part of this :-)
On 2015/04/30 13:13, Stuart Henderson wrote:
> Diff below allows ix(4) to support 1Gb LX SFP in its SFP+ port. It is
> https://github.com/torvalds/linux/commit/345be204dcbb2cc7580a63bc377a185125a6f822.patch
> ported to our driver. Small changes to the 3rd hunk of the ixgbe_phy.c
> patch as we don't have the "enforce_sfp" flag that Linux has.
>
> Goes from this:
>
> ix1 at pci1 dev 0 function 1 "Intel 82599" rev 0x01: Unsupported SFP+ Module
>
> to a working interface, albeit with wrong media flag in ifconfig:
>
> # ifconfig ix1
> ix1: flags=8843<UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST> mtu 1500
> lladdr 00:1b:21:c0:25:bd
> priority: 0
> groups: egress
> media: Ethernet autoselect (1000baseT full-duplex,rxpause,txpause)
> status: active
> inet 192.168.42.216 netmask 0xffffff00 broadcast 192.168.42.255
>
> OK?
>
>
> Index: if_bnx.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_bnx.c,v
> retrieving revision 1.110
> diff -u -p -r1.110 if_bnx.c
> --- if_bnx.c 10 Mar 2015 15:28:48 -0000 1.110
> +++ if_bnx.c 30 Apr 2015 11:54:29 -0000
> @@ -4085,7 +4085,7 @@ bnx_init_rx_chain(struct bnx_softc *sc)
> rxbd->rx_bd_haddr_lo = addr;
> }
>
> - if_rxr_init(&sc->rx_ring, 2, sc->max_rx_bd);
> + if_rxr_init(&sc->rx_ring, 16, sc->max_rx_bd);
>
> /* Fill up the RX chain. */
> bnx_fill_rx_chain(sc);
> Index: ixgbe_82599.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/ixgbe_82599.c,v
> retrieving revision 1.10
> diff -u -p -r1.10 ixgbe_82599.c
> --- ixgbe_82599.c 5 Aug 2013 19:58:06 -0000 1.10
> +++ ixgbe_82599.c 30 Apr 2015 11:54:29 -0000
> @@ -372,6 +372,8 @@ int32_t ixgbe_get_link_capabilities_8259
> /* Check if 1G SFP module. */
> if (hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 ||
> hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 ||
> + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 ||
> + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 ||
> hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||
> hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1) {
> *speed = IXGBE_LINK_SPEED_1GB_FULL;
> Index: ixgbe_phy.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/ixgbe_phy.c,v
> retrieving revision 1.12
> diff -u -p -r1.12 ixgbe_phy.c
> --- ixgbe_phy.c 25 Aug 2014 14:26:25 -0000 1.12
> +++ ixgbe_phy.c 30 Apr 2015 11:54:29 -0000
> @@ -1112,6 +1112,13 @@ int32_t ixgbe_identify_sfp_module_generi
> else
> hw->phy.sfp_type =
> ixgbe_sfp_type_1g_sx_core1;
> + } else if (comp_codes_1g & IXGBE_SFF_1GBASELX_CAPABLE) {
> + if (hw->bus.lan_id == 0)
> + hw->phy.sfp_type =
> + ixgbe_sfp_type_1g_lx_core0;
> + else
> + hw->phy.sfp_type =
> + ixgbe_sfp_type_1g_lx_core1;
> } else {
> hw->phy.sfp_type = ixgbe_sfp_type_unknown;
> }
> @@ -1199,6 +1206,8 @@ int32_t ixgbe_identify_sfp_module_generi
> if (comp_codes_10g == 0 &&
> !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 ||
> hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 ||
> + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 ||
> + hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 ||
> hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 ||
> hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1)) {
> hw->phy.type = ixgbe_phy_sfp_unsupported;
> @@ -1258,12 +1267,16 @@ int32_t ixgbe_get_sfp_init_sequence_offs
> * SR modules
> */
> if (sfp_type == ixgbe_sfp_type_da_act_lmt_core0 ||
> + sfp_type == ixgbe_sfp_type_1g_lx_core0 ||
> sfp_type == ixgbe_sfp_type_1g_cu_core0 ||
> - sfp_type == ixgbe_sfp_type_1g_sx_core0)
> + sfp_type == ixgbe_sfp_type_1g_sx_core0 ||
> + sfp_type == ixgbe_sfp_type_1g_lx_core0)
> sfp_type = ixgbe_sfp_type_srlr_core0;
> else if (sfp_type == ixgbe_sfp_type_da_act_lmt_core1 ||
> + sfp_type == ixgbe_sfp_type_1g_lx_core1 ||
> sfp_type == ixgbe_sfp_type_1g_cu_core1 ||
> - sfp_type == ixgbe_sfp_type_1g_sx_core1)
> + sfp_type == ixgbe_sfp_type_1g_sx_core1 ||
> + sfp_type == ixgbe_sfp_type_1g_lx_core1)
> sfp_type = ixgbe_sfp_type_srlr_core1;
>
> /* Read offset to PHY init contents */
> Index: ixgbe_type.h
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/ixgbe_type.h,v
> retrieving revision 1.20
> diff -u -p -r1.20 ixgbe_type.h
> --- ixgbe_type.h 25 Aug 2014 14:26:25 -0000 1.20
> +++ ixgbe_type.h 30 Apr 2015 11:54:29 -0000
> @@ -2798,6 +2798,8 @@ enum ixgbe_sfp_type {
> ixgbe_sfp_type_1g_cu_core1 = 10,
> ixgbe_sfp_type_1g_sx_core0 = 11,
> ixgbe_sfp_type_1g_sx_core1 = 12,
> + ixgbe_sfp_type_1g_lx_core0 = 13,
> + ixgbe_sfp_type_1g_lx_core1 = 14,
> ixgbe_sfp_type_not_present = 0xFFFE,
> ixgbe_sfp_type_unknown = 0xFFFF
> };
>
