This time adding support for Sunrisepoint-H and Sunrisepoint-LP.
Because of all the failed attempts by Intel to get their 10nm process
under control, this may cover Intel Mobile CPUs marketed as 6th, 7th,
8th, 9th and 10th generation.  So if you have a Laptop that isn't at
least 5 years old, give this a try if pchgpio(4) doesn't attach.  This
may fix all sorts of issues with keyboards, touchpads or
suspend/resume.

ok?


Index: dev/acpi/pchgpio.c
===================================================================
RCS file: /cvs/src/sys/dev/acpi/pchgpio.c,v
retrieving revision 1.8
diff -u -p -r1.8 pchgpio.c
--- dev/acpi/pchgpio.c  29 Sep 2021 22:03:33 -0000      1.8
+++ dev/acpi/pchgpio.c  9 Oct 2021 18:54:41 -0000
@@ -107,13 +107,76 @@ struct cfdriver pchgpio_cd = {
 };
 
 const char *pchgpio_hids[] = {
+       "INT344B",
        "INT3450",
+       "INT3451",
+       "INT345D",
        "INT34BB",
        "INT34C5",
        "INT34C6",
        NULL
 };
 
+/* Sunrisepoint-LP */
+
+const struct pchgpio_group spt_lp_groups[] =
+{
+       /* Community 0 */
+       { 0, 0, 0, 23, 0 },             /* GPP_A */
+       { 0, 1, 24, 47, 24 },           /* GPP_B */
+
+       /* Community 1 */
+       { 1, 0, 48, 71, 48 },           /* GPP_C */
+       { 1, 1, 72, 95, 72 },           /* GPP_D */
+       { 1, 2, 96, 119, 96 },          /* GPP_E */
+       
+       /* Community 3 */
+       { 2, 3, 120, 143, 120 },        /* GPP_F */
+       { 2, 4, 144, 151, 144 },        /* GPP_G */
+};
+
+const struct pchgpio_device spt_lp_device =
+{
+       .pad_size = 16,
+       .gpi_is = 0x100,
+       .gpi_ie = 0x120,
+       .groups = spt_lp_groups,
+       .ngroups = nitems(spt_lp_groups),
+       .npins = 176,
+};
+
+/* Sunrisepoint-H */
+
+const struct pchgpio_group spt_h_groups[] =
+{
+       /* Community 0 */
+       { 0, 0, 0, 23, 0 },             /* GPP_A */
+       { 0, 1, 24, 47, 24 },           /* GPP_B */
+
+       /* Community 1 */
+       { 1, 0, 48, 71, 48 },           /* GPP_C */
+       { 1, 1, 72, 95, 72 },           /* GPP_D */
+       { 1, 2, 96, 108, 96 },          /* GPP_E */
+       { 1, 3, 109, 132, 120 },        /* GPP_F */
+       { 1, 4, 133, 156, 144 },        /* GPP_G */
+       { 1, 5, 157, 180, 168 },        /* GPP_H */
+
+       /* Community 3 */
+       { 2, 0, 181, 191, 192 },        /* GPP_I */
+};
+
+const struct pchgpio_device spt_h_device =
+{
+       .pad_size = 16,
+       .gpi_is = 0x100,
+       .gpi_ie = 0x120,
+       .groups = spt_h_groups,
+       .ngroups = nitems(spt_h_groups),
+       .npins = 224,
+};
+
+/* Cannon Lake-H */
+
 const struct pchgpio_group cnl_h_groups[] =
 {
        /* Community 0 */
@@ -146,6 +209,8 @@ const struct pchgpio_device cnl_h_device
        .npins = 384,
 };
 
+/* Cannon Lake-LP */
+
 const struct pchgpio_group cnl_lp_groups[] =
 {
        /* Community 0 */
@@ -173,6 +238,8 @@ const struct pchgpio_device cnl_lp_devic
        .npins = 320,
 };
 
+/* Tiger Lake-LP */
+
 const struct pchgpio_group tgl_lp_groups[] =
 {
        /* Community 0 */
@@ -205,6 +272,8 @@ const struct pchgpio_device tgl_lp_devic
        .npins = 360,
 };
 
+/* Tiger Lake-H */
+
 const struct pchgpio_group tgl_h_groups[] =
 {
        /* Community 0 */
@@ -242,7 +311,10 @@ const struct pchgpio_device tgl_h_device
 };
 
 struct pchgpio_match pchgpio_devices[] = {
+       { "INT344B", &spt_lp_device },
        { "INT3450", &cnl_h_device },
+       { "INT3451", &spt_h_device },
+       { "INT345D", &spt_h_device },
        { "INT34BB", &cnl_lp_device },
        { "INT34C5", &tgl_lp_device },
        { "INT34C6", &tgl_h_device },

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