Wait a second - are you saying that the compiler is smart enough to account for the 'while' and the 'output_toggle' instructions to make the total execution time for the loop be precisely 50 clock ticks?
-----Original Message----- From: Chuck Harris If I wanted to divide a 10MHz clock down to 100KHz, I could do something like: while(1){ delay_us(5); output_toggle(PIN_A0); } _______________________________________________ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts