At 5:31 PM -0400 8/8/06, John Ackermann N8UR wrote: >Randy Warner said the following on 08/08/2006 03:23 PM: > >> I have been seeing a lot of traffic concerning making 10MHz frequency >> dividers using PIC's. While they provide an elegant solution to >> providing an accurate 1PPS from a precision source, I have to ask if >> there is a reason for going this route? I am just using three HCT40103 >> down counters hooked to a DS4000 to get what I think is a very stable >> 1PPS. Am I missing something? I realize 40103's are as old as dirt (I >> guess I am showing my 4000 series CMOS days), but the HCT series have >> plenty of bandwidth. > >Hi Randy -- > >I think the concern in using the older discrete devices is their >potential for jitter in general, and temperature sensitivity on top of >that. But I've never done any experiments on just how big a problem >those issues are. > >John
All this talk of frequency dividers brings up a point - there are good ways and bad ways to divide 10 MHz down to 1PPS. The bad way is to just string seven 7490 ripple counters together - the jitter caused by 28 slow flip-flop stages in series is going to be rather big. Adding a resynchronizer to the 1PPS signal made from a fast flip-flop (74FCT74) and clocked by 10 MHz is the way to go. Just make sure that your divider chain doesn't cause enough delay that the resyncer's input sees a transition near the clock's edge! To deal with that, add resynchronizers whenever the propagation delay is approaching the clock period. -- --David Forbes, Tucson, AZ http://www.cathodecorner.com/ _______________________________________________ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts