Bruce Griffiths wrote: > Poul-Henning Kamp wrote: > >> In message <[EMAIL PROTECTED]>, Bruce Griffiths writes: >> >> >> >>> The thorny issues of avoiding the noisy environment of a PC and its >>> unstable PCI clock whilst still allowing a PC to be synchronised to an >>> external timebase may perhaps be adressed by: >>> >>> Producing a simple PCI (or PCIe, or even ISA bus card - still widely >>> used in industry) >>> >>> >> You don't need that. >> >> If you have an external timestamping device you can just generate >> any relevant signal from the PC (I prefer parallel ports, but they're >> going out of vogue) and time that relative to whatever clock your >> OS uses, then read back from your timestamping device (via USB ?) >> and calibrate accordingly. >> >> Modules cable-length and slope of your generating signal (EMI >> filtering), there is no difference in the resulting precision. >> >> BTW: I belive the NI PCI-66xx series of cards can be used also, >> but I've never actually tried, I only read the low-level doc. >> >> >> > That certainly sidesteps the PC bus obsolescence issue until suitable > interfaces such as parallel ports and serial ports vanish never to be > replaced. > It would be relatively easy to include an optically isolated (or > functional equivalent such as the Analog Devices chip scale transformer > isolators) port on the external time stamp device for such an application. > > Since USB and Firewire ports may persist a little longer, is it possible > to use similar techniques with these interfaces? > > Do you mean that the PCI66XX boards could be used to implement the > multichannel timestamp function? > If so then most of the issues associated with PC noise may be addressed > by using a small external board that incorporates RF transformers and to > break LF ground loops and has clock conditioning circuity to produce > logic level clocks for the PCI66XX board from sinewave inputs. > > Bruce > After reading the PCI 66xx datasheets, it would appear that the external board should also include a synchronous programmable PPS divider for each channel. Since the number of available clocks is limited in an FPGA it may be best to use a single FPGA per channel, this also avoids crosstalk between channels allowing the dividers to be used effectively with higher resolution time stamp instruments when this is useful.
Bruce _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
