>From some data sheets, if the Vcc to the external Flip Flop is regulated >toward the high end of normal range the delay is reduced but not sure abt the >jitter, my guess is they are inversely related but maybe a smaller delay means >less jitter even if it increases in % of the delay. If you used a crystal oven >on the FF then you could control the temperature but perhaps the higher temp >would increase the jitter. Cooling with a Peltier effect CPU heat sink and >thermostat instead of an oven to control the temp set below ambient ? Doesn't >appear to conform to the KISS principal but does help me understand a little >better. This reminds me of the laws of thermodynamics which are often >abstract.
----- Original Message ---- From: Didier Juges <[EMAIL PROTECTED]> To: Tom Van Baak <[EMAIL PROTECTED]>; Discussion of precise time and frequency measurement <time-nuts@febo.com> Sent: Sunday, April 13, 2008 10:09:47 AM Subject: Re: [time-nuts] 5 MHZ PIC PPS Divider? Tom, While the outputs change state synchronously with the clock, there may be many gates and latches inside the chip between the clock pin and the output, and the delay through those will be affected by temperature, supply voltage glitches and ground bounce, things that are not necessarily very well controlled inside the chip, so the jitter has to be more than a single external D-latch of J-K flip-flop with a decoupling cap across it will provide. Didier > -----Original Message----- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf Of Tom Van Baak > Sent: Sunday, April 13, 2008 9:55 AM > To: Discussion of precise time and frequency measurement > Subject: Re: [time-nuts] 5 MHZ PIC PPS Divider? > > > If minimising the PPS jitter, is important adding a single > D flipflop > > to resynchronise the output PPS signal to the 5MHz input > will be worthwhile. > > A relatively complex chip like a PIC is likely to produce a > PPS output > > signal with a jitter much greater than that produced by a > single flipflop. > > Bruce, double check the PIC data sheet and see if this is > really true. They are not complex chips; they run DC to 10 > MHz, and all outputs are synchronous with the clock. > > > Measuring the PPS output jitter of the PIC will be somewhat > > challenging as It I would expect it to be somewhat less than 100ps. > > I think way less. I measured it with a 5370B when I designed > the divider ten years ago. But I'll measure it again for you > using better equipment. > > > The corresponding output jitter at the resynchronising > flipflop output > > should be significantly less than 10ps even for a 74HC74. > > In this case only the flipflop's random jitter is > significant as the > > frequency and duty cycle of the PPS input to the flipflop > are constant > > apart from the effects of jitter. > > > > Bruce > > This would be an interesting experiment. > > /tvb > > > _______________________________________________ > time-nuts mailing list -- time-nuts@febo.com To unsubscribe, > go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > Internal Virus Database is out-of-date. > Checked by AVG. > Version: 7.5.519 / Virus Database: 269.22.5/1358 - Release > Date: 4/3/2008 6:36 PM > > Internal Virus Database is out-of-date. Checked by AVG. Version: 7.5.519 / Virus Database: 269.22.5/1358 - Release Date: 4/3/2008 6:36 PM _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
