In the later version the input amplifier has a gain of 2x and the output
amplifiers have unity gain.
Whilst the reverse isolation (and output impedance) can be improved by
using a complementary symmetry emitter follower output stage, one has to
ask at that point is the performance gain worth it?
One has then in effect built a high open loop gain discrete current
feedback opamp that has a somewhat lower input noise than a wide band IC
opamp but it0 uses more components.
The problem with wide bandwidth opamps is there is very little data
available on their RF flicker noise.
The measurement data I have seen for an isolation amp using a 2N5179 and
a 2N3904 in a Sziklair pair configuration as the input stage indicates
that it doesn't seem to noticeably degrade the phase noise of a 10811A.
However no residual phase noise measurements have been made.
Bruce
Bob Camp wrote:
Hi
Since it's the input stage, it's likely the point most impacted by a higher
flicker noise part. That might make one want to look at alternatives.
Of course, it's not real clear that a super low noise amp is needed in this
case.
Bob
On Feb 12, 2010, at 8:46 PM, Bruce Griffiths wrote:
The series RC to ground keeps the high frequency impedance seen by Q1 and Q7
low so that the base current noise which increases significantly as the
frequency approaches the ft of these transistors.
However such a series RC network does little to suppress the the rise due to
gain peaking.
A shunt capacitor from the output stage collectors to the output stage bases is
much more effective for the 2x gain stage.
Such a capacitor increases the noise for the 1x gain White emitter follower.
Using an input transistor with higher bandwidth is more effective in this case.
Bruce
Bob Camp wrote:
Hi
I suspect your noise spike can be cured by a series R-C to ground from the
junction of Q1 base, Q7 base and all the other stuff. Something is going to
have to set a high frequency roll off. With no coils some combo of R and C is
going to have to do it.
You might also try returning all of the upper emitter resistor bypasses to
ground rather than B+. Another alternative would be emitter to emitter bypass
as shown on the JPL schematic. I'm guessing both would improve isolation in a
real world circuit.
Bob
On Feb 11, 2010, at 8:34 PM, Bruce Griffiths wrote:
life speed wrote:
Message: 2
Date: Fri, 12 Feb 2010 12:12:29 +1300
From: Bruce Griffiths<bruce.griffi...@xtra.co.nz>
The output (collectors of Q5, Q6 emitter of Q4) of the input amplifier
sets the dc voltage at the inputs ( Q1 base, Q7 base respectively) of
the output amplifiers.
The circuit consists of a unity gain input amplifier (Q4, Q5, Q6) that
drives a pair of output amplifiers (Q1, Q2, Q3 and Q7, Q8, Q9
respectively) each with a gain of 2x (6dB).
The input amplifier is essentially a white emitter follower with a
complementary symmetry output stage (shown in transistor electronics
books from the 1960's) where an input CE transistor drives a
complementary pair of CE transistors with feedback from the common
collectors of the 2 output transistors to the input transistor emitter.
In effect its merely a very simple unity gain opamp. Its usually best to
ensure that the CE output stage pair provide the dominant open loop
pole. Using a higher ft (2 to 3x) input transistor than the output pair
is the usual way of ensuring this.
Well, it is so obvious now that you explained it. I had forgot about the need
for one of the stages to set the dominant pole.
Thanks Bruce and Bob for sharing your obsession with frequency controls. I'll
simulate this further, and have a prototype PCB built within the next few
weeks. I did notice the resistor at the base of Q2,5,8 is responsible for
significant noise. I'll have to be careful with the bias circuit.
Have to get busy for now, but I will report back with results.
Best regards,
Clay
Clay
One can always use a smaller resistor in series with an RF choke that has no
resonances in the region of interest.
The attached circuit schematic illustrates one method of biasing for which the
emitter current of the input transistor can be largely sourced via a resistor
rather than from the collector current of the npn output transistor.
My simulations indicate if that one uses 2N3904's as the input device rather
than the 2N5179's shown that there is an enormous peak in the output noise
spectrum at around 150-200MHz or so.
When the 2N5179 is used this noise peak is much smaller and broader.
Use the same bias divider bypassing techniques that NIST used including the use
of electrolytic caps (they used tantalum caps) to reduce the low frequency
noise from the power supply. The ceramic bypass caps ensure sufficient
isolation between stages.
Simulating the reverse isolation with realistic component parasitics is always
informative/useful.
Bruce
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