Hi

Is -195 dbc/Hz floor good enough or is it overkill?

Is -155 dbc/Hz at 100 Hz offset a requirement or is -40 dbc ok?

You need to quantify what you are after before deciding on an approach. Low 
noise means many different things to each of us.

Bob 



On Sep 18, 2010, at 1:27 PM, francesco messineo <francesco.messi...@gmail.com> 
wrote:

> On 9/18/10, Magnus Danielson <mag...@rubidium.dyndns.org> wrote:
> 
>> 
>> A simple PLL is not that complex these days. As long as you have fairly
>> high comparator frequency after dividing down the VCO and reference you
>> could get away fairly easilly. Standard programmable dividers in the TTL
>> family and a single chip for phase-comparator will work fairly well.
>> There is gazillions of examples among hams for this approach.
> 
> sure, but I'd need to at least understand what's low noise and what's
> not again :-)
> 
> 
>>> 
>>> -) if there were many others with my same needs, we'd probably find
>>> better to use a modern DDS (share the pcb making and someone who can
>>> do the soldering of such packages), instead, so far the low-VHF people
>>> aren't generally aware that better frontends are possible, you find
>>> lot of work in the HF receivers and next to nothing in the lower VHF
>>> where big signals and intermodulations come from broadcasts and not
>>> from other amateur stations!
>> 
>> Maybe the DDS board from the DMTD project would fit your needs?
> 
> maybe, I didn't follow that thread, what DDS chip is used? What's the
> clock source?
> In this moment I'd pretty much like it fits my needs, also because of
> Rick's comment (I would order custom made xtals if it's not going to
> cost more than the rest of the parts and if I know what to order).
> 
> 
> Regards
> Frank  IZ8DWF
> 
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