This thread makes me appreciated the Symetricom. Just apply 24V and let the internal switcher and regulator do the work.
I've designed chips with both bipolar and Pfet pass devices. I really don't like the PNP pass device scheme used in LDOs. There are all sorts of design kludges involved in using a bipolar pass, mostly due to circuitry to keep the BJT out of saturation, and "beta boost" schemes. The Pfet scheme is much cleaner. With a well designed P-fet pass LDO, the high frequency rejection will be set by a capacitor divider comprised of the CDS cap and the filter cap. That is, at some point the error amp runs out of bandwidth. The manufacturer should have a graph of rejection versus frequency. When you use an inductor, the question is how big is the inductor. Not the physical size, but the effect of the field produced by the inductor. Texas Instruments has a lot of LDOs with integral pfets. _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
