Hi
What is the resulting square wave going to be used for?
A simple biased ACMOS gate is adequate for a lot of applications. A 0.1 uf
cap to couple the signal to the input. A 120K to B+ and a 100K to ground for
bias on the same input. Square wave comes out the other side. One usually
terminates the line with 50 ohms ahead of the blocking cap. If the rest of
your hex inverter is used for other things in the circuit, it's definitely
the bang for the buck champion.
That said, it's not the phase noise champion, or the highest dynamic range
circuit in the group. Which brings us back to - what are you using it for?
Bob
On Mar 24, 2011, at 5:22 AM, Bruce Griffiths wrote:
The attached circuit uses lower capacitance Schottky diodes than the
BAT45 to reduce the capacitive feedthrough so that a much smaller value
compensation capacitor can be used.
It also draws a relatively constant current from the supply and the
capacitive coupling between the diodes ensures that the effect of transistor
and diode mismatch has little effect on the switching thresholds.
Faster switching will occur if the pnp transistor (Q2, Q3) emitter
current has a minimum value of a few mA whilst the diode current actually
goes to zero however this requires a negative supply to ensure that the
output signal actually switches to ground. Additional unswitched current
sources for the pnp transistor emitters (Q2, Q3) are also required.
The Wenzel circuits lacking the constant current sources have a
significant pulsed current flowing in the supply bypass system.
This can be reduced by adding an inductor in series with the emitter
resistor, however this has the drawback that the value of the emitter
resistor required depends on the input signal amplitude.
Bruce
Charles P. Steinmetz wrote:
One problem that is evident when a simple longtailed pair (differential
amplifier) is used to convert a sine wave to a square wave is the tilt that
is evident in the waveform when the output transistor is conducting. This is
due to feedthrough from the input signal via the emitter base capacitance of
the input transistor to the emitter of the output transistor.
The attached circuit schematic illustrates one classical method of
minimising this tilt.
Compensation isn't perfect due to the voltage dependence of the emitter
base capacitance but the tilt can be significantly reduced,
I have used the attached circuit, which is a bit simpler, to the same
end. For the reason you stated, the compensation is not perfect, but it is
surprisingly good. The compensation slows the rise and fall times by about
1 nS, from about 7.5 nS to about 8.5 nS.
This circuit produces 5 Vpp output -- for 3.3 Vpp output, using a 121
ohm tail resistor should work.
Best regards,
Charles
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