The jitter when taking only the MSB is same as the DDS clock period. I
don't think that squaring the filtered sinewave you will get that jitter
(of course, if you square the sinewave with no filtering, you will get
the same jitter that taking only the MSB). In fact, it is the reason
that AD9850/AD9851 include a comparator instead of just an MSB output.
Regards,
Javier
El 20/06/2011 17:04, Poul-Henning Kamp escribió:
In message<4dff5f2f.7050...@hvsistemas.es>, Javier Herrero writes:
No, it is not the same. If you just use the MSB of the accumulator, it =
has a lot of period jitter. It can be unnoticeable if the ration between =
reference frequency and output frequency is very high.
In practice, this jitter is a lot lower than you get from
squaring the sinewave.
--
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Javier Herrero EMAIL: jherr...@hvsistemas.com
Chief Technology Officer
HV Sistemas S.L. PHONE: +34 949 336 806
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