Hello again, Thank you all for your recommendations. It looks like I will go with a ThunderBolt: I have found Trimble's manual online, read all of it, and it looks like the unit will do exactly what I am after.
I will feed all 3 outputs from the TBolt (10 MHz, 1 PPS, EIA-232) to a custom timekeeper motherboard I'm going to build. My board will feature a daughterboard seat for the HECPQ CPU module (a type of PowerPC, the same kind I've decided to use for my otherwise totally unrelated non-Ethernet WAN router work) and an FPGA for the timing functions. The 10 MHz and 1 PPS inputs will go to the FPGA which will generate millisecond interrupts to the PowerPC module per the logic which I have described in my previous posts. The way the TBolt generates its 10 MHz and 1 PPS signals (according to Trimble's manual at least) is perfect for my logic. Why millisecond interrupts and not something else? Well, my firm desire and intent is to run my own HECBSD on this thing, a stripped-down embedded version of 4.3BSD-Quasijarus. The latter is my very own operating system and I obviously know it very well inside out. That includes the timekeeping code, and I know that feeding it timer interrupts that are spaced 1 ms (SI) apart and which have a known relation to MCAT PPS will make it easy for me to do what I want in terms of HECBSD in-kernel timekeeping and UTR timescale generation. I'm also going to write a formal spec for my UTR timescale; I will post it both here and on leapsecs. MS _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
