Chris Albertson <albertson.ch...@gmail.com> wrote: > Why such complex a system when you don't need it? An FPGA???
Fixing a logic mistake in an FPGA involves editing a Verilog source file and recompiling; fixing a logic mistake in discrete logic involves a board respin. I much prefer editing ASCII text source files and recompiling over respinning PCBs. MS _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
