Attila Kinali wrote:
Hi Bruce,
On Thu, 26 Apr 2012 07:15:41 +1200
Bruce Griffiths<bruce.griffi...@xtra.co.nz> wrote:
If a suitable ADC is used the interpolator can be simplified
considerably whilst improving its performance.
Could you tell a little bit more about what a "suitable ADC" for
a time interpolator is? And how exactly does it help to simplify
the interpolator?
Attila Kinali
If a capacitive input charge redistribution ADC is used the interpolator
output capacitor can be directly connected to it.
This eliminates the output buffer amp with its unknown settling time as
well as the associated gain and offset adjustements.
The TDC capacitor merely acts as temporary charge storage to ensure the
ADC input voltage limits arent exceeded during the charging phase.
The charge is redistributed between the external capacitor and the ADC
sampling capacitance with a time constant set the ADC sampling switch on
resistance.
All the calibration adjustments can be eliminated and replaced by
software calibration if reasonably close tolerance parts are used.
Most of the ADCs built into current microprocessors are capacitive input
charge redistribution ADCs.
One just needs to ensure that the ADC input leakage current is
sufficiently small.
The specified pin leakage current test limits are considerably higher
than the actual leakage.
If an external ADC is used higher resolution is possible.
The addition of a ground plane to the PCB should also improve the
perfformance.
The current source also needs a little tweaking (high frequency
decoupling of the transistor emitter and base from the opamp) to improve
its transient response.
Bruce
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