Hi

The 9852 can be dithered from an external source. Of course, to be effective, 
you need a source that can calculate and transmit a multi megabit / second bit 
stream to do it. That gets you right back to the FPGA. The net result is not as 
good as a full blown FPGA approach, but it is indeed better than the stock part.

Bob

On May 28, 2012, at 8:12 AM, Ulrich Bangert wrote:

> Gentlemen,
> 
> in general i can second Bruce's comments on the topic. But since I
> constructed a DDS based GPSDO of my own and constructed two DDS based offset
> generators of my own I would like to add some comments that arise mainly
> from experience:
> 
> 1) The absolute size of the phase and amplitude truncation errors are a
> direct function of the accumulator width and the dac bit width. Two designs
> that are different in these parameters my behave VERY different.
> 
> 2) A AD9850 32 bit accumulator / 10 bit dac design is definitely NOT suited
> for serious time applications.
> 
> 3) A AD9852 48 bit accumulator / 12 bit dac design is - whith some
> compromises - suited for serious time applications.
> 
> 4) If one wants to do better a fpga solution is needed. Note that the
> current XILINX and ALTERA DDS ip cores offer no higher accumulator
> resolution than 48 bit, so you won't be able to increase the frequency
> resolution with them against the AD9850. Nevertheless they feature a number
> of interpolation and dithering tricks to decrease the phase and amplitude
> truncation errors. Note that you can take advantage out of these tricks then
> and only then when the DDS is allowed to produce an output word with
> sufficient bit width. As long as the NCO is completely INSIDE the fpga (as
> in John Miles's Timepod project) wide output words are not a problem.
> However if you are thinking of producing a real world signal keep in mind
> what bit width your external dac has to avoid an overshot in complexity in
> the fpga compared to what the dac can deliver. I would judge that a 16 bit
> output width in conjunction with a 16 bit dac as the AD5762 or the LTC1668
> is currently the best that can be done. The AD offers the higher update rate
> but the LTC is easier to connect to the DDS ip cores due to its parallel
> data input design. Design a low tempco reconstruction filter for the dac and
> please don't ask me how to do because I don't know.
> 
> 5) Although Rick is a member of the group I am always very astonished that
> his synthesizer publications specially 
> 
> http://www.karlquist.com/FCS95.pdf 
> 
> are not well known among the group members. I assume the design described
> here makes an excellent tuning circuit for use in an GPSDO albeit the
> repeated dividing and mixing increases the complexity. I am not aware which
> impact the repeated filtering has on the overall tempco. My guess is that
> the Symmetricom AOG 110 must be similar in design.
> 
> Best regards
> Ulrich Bangert 
> 
>> -----Ursprungliche Nachricht-----
>> Von: time-nuts-boun...@febo.com 
>> [mailto:time-nuts-boun...@febo.com] Im Auftrag von Bruce Griffiths
>> Gesendet: Montag, 28. Mai 2012 10:41
>> An: Discussion of precise time and frequency measurement
>> Betreff: Re: [time-nuts] DDS in GPSDO design?
>> 
>> 
>> Poul-Henning Kamp wrote:
>>> In message<4fc2a5e9.7050...@partiallystapled.com>, Michael Tharp 
>>> writes:
>>> 
>>> 
>>>> Does anyone have any comments or experience with DDS-based 
>> frequency 
>>>> references?
>>>> 
>>> I belive that is basically how the optional "output 
>> generator" works 
>>> for hydrogen masers.
>>> 
>>> 
>> The Symmetricom AOG 110 has a very small fractional frequency 
>> adjustment 
>> range of 5E-8 albeit with a resolution of 1E-19.
>> Thus it is relatively simple to ensure that the effect of any 
>> resisual 
>> DDS phase truncation and other spurs is very small.
>> 
>> Bruce
>> 
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> 
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