Am 17.12.2012 19:56, schrieb David:
My next pretrigger generator is going the differential comparator or differential ECL route with a fast ramp and precision reset. I expect jitter to be significantly better than 10s of picoseconds for delays up to about 100 nanoseconds. If I get down to 10 picoseconds of jitter, I will be happy since I have no real way to measure much below that.
That should be easy to do. I did a trigger pulse & delay for a 54750A scope. You need abt. 25 nsec delay to see the trigger event. I did it with ooold 10K ECL I still had around and a few meters of semi rigid cable. The semi rigid is surprisingly compact when wound on a piece of plastic tube. There was not much difference when watching the output of an ADCMP580 comparator, via trigger delay or via internal trigger and waiting a few clocks with the built-in delay. The ADCMP580 is a fine chip, btw. You get a lot of speed for not too much money. (digikey) I will rebuild the trigger delay over xmas, this time with CML to remove most of a systematic error in my scope setup. CML is much more friendly than ECL/PECL from a probing point of view. No need to carry Vtt to the scope and have a problematic bias tee there, or shifting the supplies until all happens to fit... regards, Gerhard _______________________________________________ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
