Good day all,

Lately I have been contemplating a variety of methods to take a high stability 
10 MHz reference multiply it up to a suitable frequency for use a the reference 
clock for a DDS, for example 10 MHz to 80 MHz or 120 MHz (or whatever).

On method is to use simple diode based doublers and triplers to get to where I 
want to be, that 10 x 2 x 2 x 2 = 80 or 10 x 3 x 2 x 2 = 120 or whatever 
combinations that would accomplish the same thing.

Another is the use of something like the Cypress CY2302 frequency multiplier 
and zero delay buffer which uses a PLL to perform it's magic (i.e 2 or 4 or 8 
or 16 times multiplication).

My goal is to be able to use the DDS to generate a stable frequency close to 
the stability of the 10 MHz reference with good phase noise although the latter 
criteria is ill defined and of lesser importance than frequency stability at 
the moment.

Anyone have any firsthand experience with the likes of the CY2302 and can 
comment on their suitability for this task?

Cheers, Graham ve3gtc

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