I'm kind of late to the party on this one, but I think the simplest
approach with the least disturbance to the operation of the original
system would be to form a VCXO and PLL.
Good old 4000 series CMOS stuff should be plenty fast enough. Two pieces
should be sufficient. For example, a CMOS 4060 counter/oscillator plus a
32,768 Hz resonator, rigged as a VCXO could make the clock, and also
divide it down to a convenient range for 1 PPS comparison. A 4046 PLL or
some simple logic could then do the comparison and make the correction
voltage to the oscillator.
Another option may be to use the clock chip's own system to get a
comparison frequency, if there is a definite and fixed relationship to
some output signal, say a digit scan line, or punctuation (colons
between HMS) flash signal. It's conceivable to then use the chip's XO,
modified to make it voltage-tuned, along with some form of phase
detector logic.
This could be very simple to implement, but would take some figuring
out, and risks hurting the clock chip if you screw up while
experimenting - a definite disturbance. So, it's probably best to use an
external circuit for all.
Ed
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