On 5/15/20 2:14 PM, Gerhard Hoffmann wrote:
No, no, no, it's not that bad :-) I should not post here in the middle
of the night. Sorry to cause that confusion.
Minimum is -90 dBc @ 50 Hz, or let's say @100 Hz @ 10 GHz.
that would equal -110 dBc@1 GHz, or -130 dBc @100 MHz, BTDT.
That's much easier.
Use one of the single chip synthesizers - they can probably do just what
you want, with adequate performance.
The question was really only about a _simple_ multiplier chain. The
style used in ham radio 10 GHz transverters has too many stages,
GaAS-Fets with 1/f and pipe cap filters. Too complicated.
Yes, that would be an ordeal, and is completely unnecessary today.
Macom still make a SRD diode, but probably it is easiest to phaselock
a ceramic puck or an on-chip VCO to a 100+ MHz crystal. The offset-
mixing removes the need for a low reference frequency or fractional
voodoo.
o
Trivially easy to lock the onchip VCO to a 10 or 100 MHz oscillator.
These days, dividing down from 10GHz isn't a chore, like it was 15 years
ago.
SRDs are a pain, they need huge drive power (100mW?) to work well, as do
the Sampling Phase Detector/ harmonic mixer equivalents. It's hard to
get a real low noise +20dBm signal . You'll spend as much time on that
as the other stuff.
Sampling phase detector and DRO from 2004
https://tmo.jpl.nasa.gov/progress_report/42-156/156C.pdf
GaAs and PLL from 2006
https://tmo.jpl.nasa.gov/progress_report/42-166/166A.pdf
You can probably do it with an off the shelf eval board.
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