Send Tinycc-devel mailing list submissions to
[email protected]
To subscribe or unsubscribe via the World Wide Web, visit
https://lists.nongnu.org/mailman/listinfo/tinycc-devel
or, via email, send a message with subject or body 'help' to
[email protected]
You can reach the person managing the list at
[email protected]
When replying, please edit your Subject line so it is more specific
than "Re: Contents of Tinycc-devel digest..."
Today's Topics:
1. Re: repo.or.cz now uses Anubis merde (Fred van Kempen)
2. Re: repo.or.cz now uses Anubis merde (Страхиња Радић)
3. Re: repo.or.cz now uses Anubis merde (noneofyourbusiness)
4. recent change to x86_64-asm.h (Herman ten Brugge)
5. Re: -nostdlib -run issue: Arguments are not passed on the
stack for the entry point (Herman ten Brugge)
----------------------------------------------------------------------
Message: 4
Date: Tue, 2 Dec 2025 14:05:45 +0100
From: Herman ten Brugge <[email protected]>
To: Herman ten Brugge via Tinycc-devel <[email protected]>
Subject: [Tinycc-devel] recent change to x86_64-asm.h
Message-ID: <[email protected]>
Content-Type: text/plain; charset=UTF-8; format=flowed
The recent change 'Implement some SSE/2 instructions' gives compiler
warnings on x86_64.
The cvtss2si and cvtsd2si seems to be implemented incorrect.
The diff below seems to fix this.
Herman
diff --git a/x86_64-asm.h b/x86_64-asm.h
index 182a775..f260484 100644
--- a/x86_64-asm.h
+++ b/x86_64-asm.h
@@ -509,10 +509,10 @@ ALT(DEF_ASM_OP2(movhps, 0x0f17, 0, OPC_MODRM,
OPT_SSE, OPT_EA | OPT_REG32 ))
DEF_ASM_OP2(addps, 0x0f58, 0, OPC_MODRM, OPT_EA | OPT_SSE, OPT_SSE )
DEF_ASM_OP2(cvtpi2ps, 0x0f2a, 0, OPC_MODRM, OPT_EA | OPT_MMX,
OPT_SSE )
DEF_ASM_OP2(cvtps2pi, 0x0f2d, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_MMX )
- DEF_ASM_OP2(cvtss2si, 0xf30f2d, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_REG64 )
-ALT(DEF_ASM_OP2(cvtss2si, 0xf3480f2d, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_REG32 ))
- DEF_ASM_OP2(cvtsd2si, 0xf20f2d, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_REG64 )
-ALT(DEF_ASM_OP2(cvtsd2si, 0xf2480f2d, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_REG32 ))
+ DEF_ASM_OP2(cvtss2si, 0xf30f2d, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_REG32 )
+ALT(DEF_ASM_OP2(cvtss2si, 0xf30f2d, 0, OPC_MODRM | OPC_48, OPT_EA |
OPT_SSE, OPT_REG64 ))
+ DEF_ASM_OP2(cvtsd2si, 0xf20f2d, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_REG32 )
+ALT(DEF_ASM_OP2(cvtsd2si, 0xf20f2d, 0, OPC_MODRM | OPC_48, OPT_EA |
OPT_SSE, OPT_REG64 ))
DEF_ASM_OP2(cvttps2pi, 0x0f2c, 0, OPC_MODRM, OPT_EA | OPT_SSE,
OPT_MMX )
DEF_ASM_OP2(andps, 0x0f54, 0, OPC_MODRM, OPT_EA | OPT_SSE, OPT_SSE )
DEF_ASM_OP2(divps, 0x0f5e, 0, OPC_MODRM, OPT_EA | OPT_SSE, OPT_SSE )
------------------------------