[Tinyos-help] Tmote SCLK Change Effects Deluge

[Matt Orlofsky]

All,

 

I changed MSP430ClockM.nc (see source code snippets below) such that the SCLK would run at the same speed as the MCLK (4MHz).  I did this to improve the maximum clock rate of the SPI bus.  The change appears to have worked in my application however Deluge does not work properly.  I'm using Deluge 2.0.  Any idea what the problem is?  Perhaps there is a delay loop in the Deluge code that is effected by the change in clock rate?  Any help would be greatly appreciated.

 

// Snippet from MSP430ClockM.nc v1.14 near line 60

 

//--------before--------//

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 2; set the divisor of SCLK to 4
    // .DCOR = 0; select internal resistor for DCO
    BCSCTL2 = DIVS1;

//-------/before--------//

 

//---------after---------//

    // BCSCTL2
    // .SELM = 0; select DCOCLK as source for MCLK
    // .DIVM = 0; set the divisor of MCLK to 1
    // .SELS = 0; select DCOCLK as source for SCLK
    // .DIVS = 0; set the divisor of MSCLK to 1
    // .DCOR = 0; select internal resistor for DCO
    BCSCTL2 = 0x00;

//--------/after---------//

Matt Orlofsky
____________________
RLW, Inc.
Phone:    814-689-1833
Cell:       585-233-8243

 

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