Hi all, Once I'd written the email on this subject to the U-Boot list, I figured it was starting to sound like a Freescale support request, so I submitted one too. Here's their response:
"Actually, snooping occurs inside MPC8349 device. Besides e300 core, other possible masters are: PCI1, PCI2, DMA, TSEC1, TSEC2, USB, Ecnryption engine." So, it does sound like there are devices internal to the MPC8349EA that are monitoring the e300 core gbl# signal, and hence the M-bit would need to be set in the BAT entries. > FYI: > - The M-bit is set for the BAT entries for: > DDR, PCI memory, SDRAM, stack-in-dcache, and Flash) > - The M-bit is not set for: > PCI I/O, IMMRs, and BCSRs > these are cache inhibited and guarded. And this list pretty much makes sense. The exception would be the stack-in-dcache, since there is no external memory associated with the stack-in-dcache trick. Trying to understand the stack-in-dcache trick was what what started all this ... but, I guess in that case, having the M-Bit set in the BAT entry doesn't really matter, since nothing is (or should be) snooping that address anyway. Sorry for the 'noise' :) Cheers, Dave ------------------------------------------------------------------------- This SF.net email is sponsored by: Microsoft Defy all challenges. Microsoft(R) Visual Studio 2008. http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ _______________________________________________ U-Boot-Users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/u-boot-users
