On 13:33 Thu 05 Jun , Hugo Villeneuve wrote:
> ARM: This patch adds support for the Lyrtech SFF-SDR
> board, based on the TI DaVinci architecture (ARM926EJS).
>
> Changes between V5 and V6:
> -New email address for contributor.
> -Init of EMIF-A CS3 address space to load FPGA.
> -Dynamic parsing of MAC address in EEPROM.
> -Add boot delay of 5 sec.
> -Use NFS for Linux boot command.
> -Add relocate flag for command history.
>
> Signed-off-by: Hugo Villeneuve <[EMAIL PROTECTED]>
> Signed-off-by: Philip Balister, OpenSDR <[EMAIL PROTECTED]>
>
> ---
>
> CREDITS | 5 +
> + /* Set the Bus Priority Register to appropriate value */
> + REG(VBPR) = 0x20;
> +
> + timer_init();
> +
> + return(0);
> +}
> +
Is it possible that you add a documentiation about the EEPROM content?
> +/* Read ethernet MAC address from Integrity data structure inside EEPROM. */
> +int read_mac_address(uint8_t *buf)
> +{
> + u_int32_t value, mac[2], address;
> +
> + /* Read Integrity data structure checkword. */
> + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET,
> + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) {
> + printf("Read from EEPROM @ 0x%02x failed\n",
> + CFG_I2C_EEPROM_ADDR);
> + return 1;
> + }
> + if (value != INTEGRITY_CHECKWORD_VALUE)
> + return 1;
> +
> + /* Read SYSCFG structure offset. */
> + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET,
> + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) {
> + printf("Read from EEPROM @ 0x%02x failed\n",
> + CFG_I2C_EEPROM_ADDR);
> + return 1;
> + }
> + address = 0x800 + (int) value; /* Address where SYSCFG structure
> + * is located. */
> +
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +#include <asm/sizes.h>
> +
> +/*=======*/
> +/* Board */
> +/*=======*/
If Possible use this kind of comment style
/*
*
*/
I'll ack this too
> +#define SFFSDR
> +#define CFG_NAND_LARGEPAGE
> +#define CFG_USE_NAND
> +/*===================*/
> +/* SoC Configuration */
> +/*===================*/
> +#define CONFIG_ARM926EJS /* arm926ejs CPU core */
> +#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
> +#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
> +#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
> +#define CFG_HZ 1000
> +/*==================================================*/
> +/* EEPROM definitions for Atmel 24LC64 EEPROM chip */
> +/*==================================================*/
> +#define CFG_I2C_EEPROM_ADDR_LEN 2
> +#define CFG_I2C_EEPROM_ADDR 0x50
> +#define CFG_EEPROM_PAGE_WRITE_BITS 5
> +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
> +/*=============*/
> +/* Memory Info */
> +/*=============*/
> +#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len
> */
> +#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
> +#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
> +#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
> +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
> +#define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel
> + * load address. */
> +#define CONFIG_VERSION_VARIABLE
> +#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far,
> + * may be later */
> +#define CFG_HUSH_PARSER
> +#define CFG_PROMPT_HUSH_PS2 "> "
> +#define CONFIG_CMDLINE_EDITING
> +#define CFG_LONGHELP
> +#define CONFIG_CRC32_VERIFY
> +#define CONFIG_MX_CYCLIC
> +/*===================*/
> +/* Linux Information */
> +/*===================*/
> +#define LINUX_BOOT_PARAM_ADDR 0x80000100
> +#define CONFIG_CMDLINE_TAG
> +#define CONFIG_SETUP_MEMORY_TAGS
> +#define CONFIG_BOOTARGS \
> + "mem=56M " \
> + "console=ttyS0,115200n8 " \
> + "root=/dev/nfs rw noinitrd ip=dhcp " \
> + "nfsroot=${serverip}:/nfsroot/sffsdr " \
> + "nwhwconf=device:eth0,hwaddr:${ethaddr}"
> +#define CONFIG_BOOTCOMMAND \
> + "nand read 87A00000 100000 300000;" \
> + "bootelf 87A00000"
Could you align it or I will do it when I'll apply the patch,
If it's ok with you.
Best Regards,
J.
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