Change at91 CPUs based on arm926ejs to return milliseconds
from get_timer and get_ticks. Also changes in the value of
CONFIG_SYS_HZ to 1000 in all board configs using these CPUs.
This will not compile on boards using these CPUs with a
different value for CONFIG_SYS_HZ.
Signed-off-by: Detlef Vollmann <d...@vollmann.ch>
---
cpu/arm926ejs/at91/timer.c | 37 +++++++++++++++++++++++++++++++++----
include/configs/afeb9260.h | 2 +-
include/configs/at91cap9adk.h | 2 +-
include/configs/at91sam9260ek.h | 2 +-
include/configs/at91sam9261ek.h | 2 +-
include/configs/at91sam9263ek.h | 2 +-
include/configs/at91sam9rlek.h | 2 +-
7 files changed, 39 insertions(+), 10 deletions(-)
diff --git a/cpu/arm926ejs/at91/timer.c b/cpu/arm926ejs/at91/timer.c
index fec545b..0a38a4f 100644
--- a/cpu/arm926ejs/at91/timer.c
+++ b/cpu/arm926ejs/at91/timer.c
@@ -30,6 +30,19 @@
#include <asm/arch/io.h>
/*
+ * This code essentially ignores the settings of AT91_MASTER_CLOCK
+ * and CONFIG_SYS_HZ, so we just bail out if they're not set to
+ * the canonical values.
+ */
+#if (CONFIG_SYS_HZ != 1000)
+#error "CONFIG_SYS_HZ must be set to 1000 for this CPU"
+#endif
+/* We leave some leeway for the master clock... */
+#if (AT91_MASTER_CLOCK < 85000000) || (AT91_MASTER_CLOCK > 115000000)
+#error "AT91_MASTER_CLOCK must be set to 100000000 for this CPU"
+#endif
+
+/*
* We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by
* setting the 20 bit counter period to its maximum (0xfffff).
*/
@@ -38,6 +51,7 @@
#define READ_TIMER at91_sys_read(AT91_PIT_PIIR)
#define TIMER_FREQ (AT91C_MASTER_CLOCK << 4)
#define TICKS_TO_USEC(ticks) ((ticks) / 6)
+#define TICKS_TO_MSEC(ticks) ((ticks) / 6250)
ulong get_timer_masked(void);
ulong resettime;
@@ -73,6 +87,21 @@ static inline ulong get_timer_raw(void)
return 0xFFFFFFFFUL - (resettime - now) ;
}
+static inline ulong get_timer_masked_usec(void)
+{
+ return TICKS_TO_USEC(get_timer_raw());
+}
+
+static inline ulong get_timer_usec(ulong base)
+{
+ ulong now = get_timer_masked_usec();
+
+ if (now >= base)
+ return now - base;
+ else
+ return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ;
+}
+
void reset_timer_masked(void)
{
resettime = READ_TIMER;
@@ -80,7 +109,7 @@ void reset_timer_masked(void)
ulong get_timer_masked(void)
{
- return TICKS_TO_USEC(get_timer_raw());
+ return TICKS_TO_MSEC(get_timer_raw());
}
@@ -88,8 +117,8 @@ void udelay_masked(unsigned long usec)
{
ulong tmp;
- tmp = get_timer(0);
- while (get_timer(tmp) < usec) /* our timer works in usecs */
+ tmp = get_timer_usec(0);
+ while (get_timer_usec(tmp) < usec)
; /* NOP */
}
@@ -105,7 +134,7 @@ ulong get_timer(ulong base)
if (now >= base)
return now - base;
else
- return TICKS_TO_USEC(0xFFFFFFFFUL) - (base - now) ;
+ return TICKS_TO_MSEC(0xFFFFFFFFUL) - (base - now) ;
}
void udelay(unsigned long usec)
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index 9eed342..7545bd0 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -30,7 +30,7 @@
#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz
crystal */
#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */
#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index 01da99b..3b033c5 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -33,7 +33,7 @@
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
#define CONFIG_SYS_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 2f1a41f..ec2b6f1 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -33,7 +33,7 @@
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index ebecfa4..d3209a3 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -32,7 +32,7 @@
#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 09b871a..ca60965 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -33,7 +33,7 @@
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
#define CONFIG_SYS_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 5bef1fe..caf0e22 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -32,7 +32,7 @@
#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
#define AT91_MASTER_CLOCK 100000000 /* peripheral */
#define AT91_CPU_CLOCK 200000000 /* cpu */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define CONFIG_SYS_HZ 1000 /* 1ms resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
--
1.5.4.3
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