Dear Premi,
Premi, Sanjeev wrote:
-----Original Message-----
From: Premi, Sanjeev
Sent: Tuesday, April 21, 2009 11:37 PM
To: 'Dirk Behme'
Cc: u-boot@lists.denx.de
Subject: RE: [U-Boot] [PATCH] OMAP3: Print correct silicon revision
-----Original Message-----
From: Dirk Behme [mailto:dirk.be...@googlemail.com]
Sent: Tuesday, April 21, 2009 10:26 PM
To: Premi, Sanjeev
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH] OMAP3: Print correct silicon revision
Dear Premi,
Sanjeev Premi wrote:
The function display_board_info() displays the silicon
revision as 2 - based on the return value from get_cpu_rev().
This is incorrect as the current Si version is 3.1
Thanks for the patch and fixing this!
This patch displays the correct version; but does not
change get_cpu_rev() to minimize the code impact.
I wonder if it wouldn't be better (and cleaner) to fix
get_cpu_rev()?
Yes. This is what I started with; but then this is where I felt that
fix may run 'deeper"
u32 get_board_type(void)
{
if (get_cpu_rev() == CPU_3430_ES2)
return sysinfo.board_type_v2;
else
return sysinfo.board_type_v1;
}
...sorry, mail 'went' before I wanted to!
I couldn't figure out how this impacts boards other than the EVM.
Though I admit not having much time looking for the impact. Beyond
this, I believe the fix could be straight forward.
What's about something like in the attachment? Compile tested only. Do
you like to test it?
Best regards
Dirk
A quick grep resulted in 5 (?) locations which might be affected:
./cpu/arm_cortexa8/cpu.c:104: if (get_cpu_rev() ==
CPU_3430_ES2) {
./cpu/arm_cortexa8/cpu.c:134: if (get_cpu_rev() ==
CPU_3430_ES2) {
./cpu/arm_cortexa8/omap3/clock.c:173: sil_index =
get_cpu_rev() - 1;
./cpu/arm_cortexa8/omap3/sys_info.c:144: if
(get_cpu_rev() ==
CPU_3430_ES2)
./cpu/arm_cortexa8/omap3/sys_info.c:237: sec_s,
get_cpu_rev());
If we extend the existing macros
#define CPU_3430_ES1 1
#define CPU_3430_ES2 2
to e.g.
#define CPU_3430_ES10 1
#define CPU_3430_ES20 2
#define CPU_3430_ES21 3
#define CPU_3430_ES30 4
#define CPU_3430_ES31 5
then the three
== CPU_3430_ES2
will simply become
>= CPU_3430_ES20
There seems to be a slight differene between the silicon
revision between 34x and 35x for the highest nibble value
for early si revs - ES 1.0 and ES2.0.
The sil_index = get_cpu_rev() - 1; needs a deeper look, though.
Regarding the ASCII strings: With the numbers get_cpu_rev()
returns
we then could index a const struct with the ASCII strings for the
revision print. E.g.
printf(" ... %s ...", ... omap_revision[get_cpu_rev()] ...);
What do you think?
Signed-off-by: Sanjeev Premi <pr...@ti.com>
---
cpu/arm_cortexa8/omap3/sys_info.c | 37
+++++++++++++++++++++++++++++++++++--
1 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c
b/cpu/arm_cortexa8/omap3/sys_info.c
index b385b91..8c6a4d6 100644
--- a/cpu/arm_cortexa8/omap3/sys_info.c
+++ b/cpu/arm_cortexa8/omap3/sys_info.c
@@ -36,6 +36,8 @@ static gpmc_csx_t *gpmc_cs_base =
(gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
+static char omap_revision[8] = "";
+
/*****************************************************************
* dieid_num_r(void) - read and set die ID
*****************************************************************/
@@ -90,6 +92,36 @@ u32 get_cpu_rev(void)
}
+/**
+ * Converts cpu revision into a string
+ */
+void set_omap_revision(void)
+{
+ u32 idcode;
+ ctrl_id_t *id_base;
+ char *str_rev = &omap_revision[0];
+
+ if (get_cpu_rev() == CPU_3430_ES1) {
+ strcat (str_rev, "ES1.0");
+ }
+ else {
+ id_base = (ctrl_id_t *)OMAP34XX_ID_L4_IO_BASE;
+
+ idcode = readl(&id_base->idcode);
+
+ if (idcode == 0x1B7AE02F)
+ strcat (str_rev, "ES2.0");
+ else if (idcode == 0x2B7AE02F)
+ strcat (str_rev, "ES2.1");
+ else if (idcode == 0x3B7AE02F)
+ strcat (str_rev, "ES3.0");
+ else if (idcode == 0x4B7AE02F)
It looks to me that only the highest nibble of idcode changes here?
Maybe we could better mask & shift it a little and create a
nice macro
for it?
It is already done in the kernel; but I am not sure if we could save
much - unless we use the index as you suggest above.
Best regards
Dirk
Signed-off-by: Dirk Behme <dirk.be...@googlemail.com>
---
cpu/arm_cortexa8/cpu.c | 4 ++--
cpu/arm_cortexa8/omap3/clock.c | 5 +++--
cpu/arm_cortexa8/omap3/sys_info.c | 31 +++++++++++++++++++++++--------
include/asm-arm/arch-omap3/omap3.h | 10 ++++++++--
4 files changed, 36 insertions(+), 14 deletions(-)
Index: u-boot-main/cpu/arm_cortexa8/cpu.c
===================================================================
--- u-boot-main.orig/cpu/arm_cortexa8/cpu.c
+++ u-boot-main/cpu/arm_cortexa8/cpu.c
@@ -101,7 +101,7 @@ void l2cache_enable()
volatile unsigned int j;
/* ES2 onwards we can disable/enable L2 ourselves */
- if (get_cpu_rev() == CPU_3430_ES2) {
+ if (get_cpu_rev() >= CPU_3XX_ES20) {
__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
__asm__ __volatile__("orr %0, %0, #0x2":"=r"(i));
__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
@@ -131,7 +131,7 @@ void l2cache_disable()
volatile unsigned int j;
/* ES2 onwards we can disable/enable L2 ourselves */
- if (get_cpu_rev() == CPU_3430_ES2) {
+ if (get_cpu_rev() >= CPU_3XX_ES20) {
__asm__ __volatile__("mrc p15, 0, %0, c1, c0, 1":"=r"(i));
__asm__ __volatile__("bic %0, %0, #0x2":"=r"(i));
__asm__ __volatile__("mcr p15, 0, %0, c1, c0, 1":"=r"(i));
Index: u-boot-main/cpu/arm_cortexa8/omap3/clock.c
===================================================================
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/clock.c
+++ u-boot-main/cpu/arm_cortexa8/omap3/clock.c
@@ -132,7 +132,7 @@ void prcm_init(void)
void (*f_lock_pll) (u32, u32, u32, u32);
int xip_safe, p0, p1, p2, p3;
u32 osc_clk = 0, sys_clkin_sel;
- u32 clk_index, sil_index;
+ u32 clk_index, sil_index = 0;
prm_t *prm_base = (prm_t *)PRM_BASE;
prcm_t *prcm_base = (prcm_t *)PRCM_BASE;
dpll_param *dpll_param_p;
@@ -170,7 +170,8 @@ void prcm_init(void)
* and sil_index will get the values for that SysClk for the
* appropriate silicon rev.
*/
- sil_index = get_cpu_rev() - 1;
+ if(get_cpu_rev())
+ sil_index = 1;
/* Unlock MPU DPLL (slows things down, and needed later) */
sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
Index: u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c
===================================================================
--- u-boot-main.orig/cpu/arm_cortexa8/omap3/sys_info.c
+++ u-boot-main/cpu/arm_cortexa8/omap3/sys_info.c
@@ -35,6 +35,11 @@ extern omap3_sysinfo sysinfo;
static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
+static char *rev_s[CPU_3XX_MAX_REV] = {"1.0",
+ "2.0",
+ "2.1",
+ "3.0",
+ "3.1"};
/*****************************************************************
* dieid_num_r(void) - read and set die ID
@@ -76,17 +81,27 @@ u32 get_cpu_type(void)
u32 get_cpu_rev(void)
{
u32 cpuid = 0;
+ ctrl_id_t *id_base;
/*
* On ES1.0 the IDCODE register is not exposed on L4
- * so using CPU ID to differentiate
- * between ES2.0 and ES1.0.
+ * so using CPU ID to differentiate between ES1.0 and > ES1.0.
*/
__asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
if ((cpuid & 0xf) == 0x0)
- return CPU_3430_ES1;
- else
- return CPU_3430_ES2;
+ return CPU_3XX_ES10;
+ else {
+ /* Decode the IDs on > ES1.0 */
+ id_base = (ctrl_id_t *)OMAP34XX_ID_L4_IO_BASE;
+
+ cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xF;
+
+ /* Some early ES2.0 seem to report ID 0, fix this */
+ if(cpuid == 0)
+ cpuid = CPU_3XX_ES20;
+
+ return cpuid;
+ }
}
@@ -141,7 +156,7 @@ u32 get_sdr_cs_offset(u32 cs)
************************************************************************/
u32 get_board_type(void)
{
- if (get_cpu_rev() == CPU_3430_ES2)
+ if (get_cpu_rev() >= CPU_3XX_ES20)
return sysinfo.board_type_v2;
else
return sysinfo.board_type_v1;
@@ -233,8 +248,8 @@ void display_board_info(u32 btype)
}
- printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s,
- sec_s, get_cpu_rev());
+ printf("OMAP%s-%s rev ES%s, CPU-OPP2 L3-165MHz\n", cpu_s,
+ sec_s, rev_s[get_cpu_rev()]);
printf("%s + %s/%s\n", sysinfo.board_string,
mem_s, sysinfo.nand_string);
Index: u-boot-main/include/asm-arm/arch-omap3/omap3.h
===================================================================
--- u-boot-main.orig/include/asm-arm/arch-omap3/omap3.h
+++ u-boot-main/include/asm-arm/arch-omap3/omap3.h
@@ -171,8 +171,14 @@ typedef struct gpio {
* ES1 = 0+1 = 1
* ES1 = 1+1 = 1
*/
-#define CPU_3430_ES1 1
-#define CPU_3430_ES2 2
+#define CPU_3XX_ES10 0
+#define CPU_3XX_ES20 1
+#define CPU_3XX_ES21 2
+#define CPU_3XX_ES30 3
+#define CPU_3XX_ES31 4
+#define CPU_3XX_MAX_REV CPU_3XX_ES31
+
+#define CPU_3XX_ID_SHIFT 28
#define WIDTH_8BIT 0x0000
#define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
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