Hi Jerry-san, Jerry Van Baren wrote: >>> I might be unclear. I used to use REG_SIZE = -16, as 16550 registers >>> are located at 0, +0x10, +0x20, ..., . > > 16 byte stride. That is seriously odd.
Well, 8 or 16 byte stride is not so odd, IMHO. >>> I don't know much about precise hardware logics, but the byte addresses >>> under 16-bytes-border are ignored. I'm using a big-endian mips machine. >> >> This does not make much sense to me, sorry. > > The "16" of the "16-bytes-border" statement confuses me too. Sorry for my poor vocabularies :-( > It sounds like Shinya has some pretty odd (read "broken") hardware that > is decoding the registers with a 16 byte stride, although his example > above shows a 4 byte stride (less broken). Let me reword: * my UART registers are located with 16 byte stride. * The address decoder in my UART block rounds +1/+2/+3 offsets down to zero offset. Therefore we can't do byte read/write to ns16550 registers properly; i.e. the return value of readb(x + 3) will be equal to readb(x). > I would further deduce his hardware does not support byte write > operations (I've never seen hardware that didn't support byte reads). > I've had hardware that did not support byte writes, so s/w needed to > write a word instead (given Shinya's description, the extra bytes are > "don't care"). (I've also dealt with flash connections that only > supported 64 bit writes - PITA!). Thanks for deducing :-) Yes, I wanted to say 'don't care'. > My guess is his processor limitations prevent byte writes so he has to > do 32bit (4byte) writes, but his hardware decoding results in a 16 byte > stride. The result is setting REG_SIZE to 4 gives him the r/w access he > needs (32 bits), but fails the stride. Setting it to 16 gives him the > stride he needs, but a 16 byte register is nonsensical and breaks the > software. My guess is Shinya needs another customization dial (I'm > making this up) "REG_STRIDE" = 16 as well as "REG_SIZE" = 4. Let me clarify: * My processor MIPS 4KEc doesn't have limitations on byte accesses. * My address decoder in UART block, can't handle +1/+2/+3 offsets properly. This is the reason I need 32-bit word accesses. And 16 byte stride is not related here. Thanks again for you translation, Shinya _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot