> >>> +#define CONFIG_ARMV7_NONSEC > >>> +#define CONFIG_ARMV7_VIRT > >>> +#define CONFIG_SOC_BIG_ENDIAN > >>> +#define CONFIG_DCFG_CCSR_SCRATCHRW1 0x01ee0200 > >>> +#define CONFIG_DCFG_CCSR_BRR 0x01ee00e4 > >> Why are you hardcoding the register addresses in this file? I saw that > >> all registers are defined in: > >> arch/arm/include/asm/arch-ls102xa/config.h. Why are these special? > >> > > No special, and I'll follow your advice. > > > > > >>> +#define CONFIG_SMP_PEN_ADDR CONFIG_DCFG_CCSR_SCRATCHRW1 > >>> +#define CONFIG_ARM_GIC_BASE_ADDRESS 0x01400000 > >> Why do you need the GIC base address? Can't this be read from CBAR? > >> > > I'm not very sure, I have tried, but failed, I will do some research later. > > What is not working? Is the address returned by CBAR wrong? >
It works now using the CBAR... Thanks, BRs Xiubo > Diana _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
