Suports Basic PHY init (i.e. PHY reset)
optional supported configurations:
led_init, mdipn_reverse, rgmii_delay config

This driver is tested with sheevaplug board

Signed-off-by: Prafulla Wadaskar <prafu...@marvell.com>
---
 drivers/net/phy/Makefile    |    1 +
 drivers/net/phy/mv88e1116.c |   90 +++++++++++++++++++++++++++++++++++++++++++
 drivers/net/phy/mv88e1116.h |   38 ++++++++++++++++++
 include/netdev.h            |   31 +++++++++++++++
 4 files changed, 160 insertions(+), 0 deletions(-)
 create mode 100644 drivers/net/phy/mv88e1116.c
 create mode 100644 drivers/net/phy/mv88e1116.h

diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index 3b92614..ed624b4 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
 LIB    := $(obj)libphy.a
 
 COBJS-$(CONFIG_BITBANGMII) += miiphybb.o
+COBJS-$(CONFIG_MV88E1116_PHY) += mv88e1116.o
 COBJS-$(CONFIG_MV88E61XX_SWITCH) += mv88e61xx.o
 
 COBJS  := $(COBJS-y)
diff --git a/drivers/net/phy/mv88e1116.c b/drivers/net/phy/mv88e1116.c
new file mode 100644
index 0000000..bd210f6
--- /dev/null
+++ b/drivers/net/phy/mv88e1116.c
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <netdev.h>
+#include "mv88e1116.h"
+
+/*
+ * Marvell 88E61XX PHY initialization
+ */
+int mv88e1116_phy_initialize(struct mv88e1116_config *phycfg)
+{
+       char *name = phycfg->name;
+       u16 reg;
+       u16 devadr;
+
+       if (miiphy_set_current_dev(name)) {
+               printf("%s failed\n", __FUNCTION__);
+               return -1;
+       }
+
+       /* command to read PHY dev address */
+       if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
+               printf("Error..could not read PHY dev address\n");
+               return -1;
+       }
+
+       /*
+        * Leds link and activity
+        * LED[0] On-Link, Blink-Activity, Off-NoLink
+        */
+       if (phycfg->led_init == MV88E1116_LED_INIT_EN) {
+               miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0x3);
+               miiphy_read(name, devadr, MV88E1116_LED_FCTRL_REG, &reg);
+               reg &= ~0xf;
+               reg |= 0x1;
+               miiphy_write(name, devadr, MV88E1116_LED_FCTRL_REG, reg);
+               miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
+       }
+
+       /*
+        * Enable RGMII delay on Tx and Rx for CPU port
+        * Ref: sec 4.7.2 of chip datasheet
+        */
+       if (phycfg->rgmii_delay == MV88E1116_RGMII_DELAY_EN) {
+               miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
+               miiphy_read(name, devadr, 21, &reg);
+               reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
+               miiphy_write(name, devadr, 21, reg);
+               miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
+       }
+
+       /*
+        * Reverse Transmit polarity for Media Dependent Interface
+        * Pins (MDIP) bits in Copper Specific Control Register 3
+        * Reference: table 53 chip datasheet
+        */
+       if (phycfg->mdip == MV88E1116_MDIP_REVERSE) {
+               miiphy_read(name, devadr, MV88E1116_CPRSP_CR3_REG, &reg);
+               reg |= 0xf;
+               miiphy_write(name, devadr, MV88E1116_CPRSP_CR3_REG, reg);
+       }
+
+       /* reset the phy */
+       miiphy_reset(name, devadr);
+
+       printf("88E1116 Initialized on %s\n", name);
+       return 0;
+}
diff --git a/drivers/net/phy/mv88e1116.h b/drivers/net/phy/mv88e1116.h
new file mode 100644
index 0000000..b12be22
--- /dev/null
+++ b/drivers/net/phy/mv88e1116.h
@@ -0,0 +1,38 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Prafulla Wadaskar <prafu...@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _MV88E1116_H
+#define _MV88E1116_H
+
+#include <miiphy.h>
+
+#define MV88E1116_LED_FCTRL_REG                10
+#define MV88E1116_CPRSP_CR3_REG                21
+#define MV88E1116_MAC_CTRL_REG         21
+#define MV88E1116_PGADR_REG            22
+
+#define MV88E1116_RGMII_TXTM_CTRL      (1 << 4)
+#define MV88E1116_RGMII_RXTM_CTRL      (1 << 5)
+
+#endif /* _MV88E1116_H */
diff --git a/include/netdev.h b/include/netdev.h
index 4f2b23a..f37b6ae 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -163,4 +163,35 @@ struct mv88e61xx_config {
 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
 #endif /* CONFIG_MV88E61XX_SWITCH */
 
+/*
+ * Boards with mv88e1116 PHY can use this by defining
+ * CONFIG_MV88E1116_PHY in respective board config header file
+ * the stuct and enums here are used to specify switch config params
+ */
+#if defined(CONFIG_MV88E1116_PHY)
+enum mv88e1116_cfg_mdip {
+       MV88E1116_MDIP_NOCHANGE,
+       MV88E1116_MDIP_REVERSE
+};
+
+enum mv88e1116_cfg_ledinit {
+       MV88E1116_LED_INIT_DIS,
+       MV88E1116_LED_INIT_EN
+};
+
+enum mv88e1116_cfg_rgmiid {
+       MV88E1116_RGMII_DELAY_DIS,
+       MV88E1116_RGMII_DELAY_EN
+};
+
+struct mv88e1116_config {
+       char *name;
+       enum mv88e1116_cfg_rgmiid rgmii_delay;
+       enum mv88e1116_cfg_ledinit led_init;
+       enum mv88e1116_cfg_mdip mdip;
+};
+
+int mv88e1116_phy_initialize(struct mv88e1116_config *phycfg);
+#endif /* CONFIG_MV88E1116_PHY */
+
 #endif /* _NETDEV_H_ */
-- 
1.5.3.3

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