It is convenient to be able to adjust MSRs with a structure that splits the
two 32-bit halves into separate fields, as they are often dealt with
separately. Add a few functions to support this.
Signed-off-by: Simon Glass <s...@chromium.org>
---
arch/x86/include/asm/msr.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 3b5915d..df43983 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -175,6 +175,25 @@ static inline int wrmsr_safe_regs(u32 regs[8])
return native_wrmsr_safe_regs(regs);
}
+typedef struct msr_t {
+ uint32_t lo;
+ uint32_t hi;
+} msr_t;
+
+static inline struct msr_t msr_read(unsigned msr_num)
+{
+ struct msr_t msr;
+
+ rdmsr(msr_num, msr.lo, msr.hi);
+
+ return msr;
+}
+
+static inline void msr_write(unsigned msr_num, msr_t msr)
+{
+ wrmsr(msr_num, msr.lo, msr.hi);
+}
+
#define rdtscl(low) \
((low) = (u32)__native_read_tsc())
--
2.1.0.rc2.206.gedb03e5
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