On 9 December 2014 at 07:50, Bin Meng <bmeng...@gmail.com> wrote: > Signed-off-by: Bin Meng <bmeng...@gmail.com> > > --- > > Changes in v2: > - New patch to use consistent name XXX_ADDR for binary blobs > > Makefile | 2 +- > arch/x86/cpu/ivybridge/sdram.c | 2 +- > arch/x86/cpu/queensbay/Kconfig | 4 ++-- > arch/x86/cpu/queensbay/fsp_support.c | 2 +- > arch/x86/cpu/queensbay/tnc_car.S | 2 +- > include/configs/chromebook_link.h | 2 +- > 6 files changed, 7 insertions(+), 7 deletions(-)
Well you could squash most of this into the previous patch, but it doesn't matter. Acked-by: Simon Glass <s...@chromium.org> > > diff --git a/Makefile b/Makefile > index c9ae77b..ff4c4aa 100644 > --- a/Makefile > +++ b/Makefile > @@ -973,7 +973,7 @@ IFDTOOL_ME_FLAGS += -i > ME:$(srctree)/board/$(BOARDDIR)/me.bin > endif > > ifneq ($(CONFIG_HAVE_MRC),) > -IFDTOOL_FLAGS += -w > $(CONFIG_X86_MRC_START):$(srctree)/board/$(BOARDDIR)/mrc.bin > +IFDTOOL_FLAGS += -w > $(CONFIG_X86_MRC_ADDR):$(srctree)/board/$(BOARDDIR)/mrc.bin > endif > > ifneq ($(CONFIG_X86_OPTION_ROM_ADDR),) > diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c > index df2b990..b95e781 100644 > --- a/arch/x86/cpu/ivybridge/sdram.c > +++ b/arch/x86/cpu/ivybridge/sdram.c > @@ -177,7 +177,7 @@ int sdram_initialise(struct pei_data *pei_data) > > debug("PEI data at %p, size %x:\n", pei_data, sizeof(*pei_data)); > > - data = (char *)CONFIG_X86_MRC_START; > + data = (char *)CONFIG_X86_MRC_ADDR; > if (data) { > int rv; > int (*func)(struct pei_data *); > diff --git a/arch/x86/cpu/queensbay/Kconfig b/arch/x86/cpu/queensbay/Kconfig > index 56fe85c..f6b5201 100644 > --- a/arch/x86/cpu/queensbay/Kconfig > +++ b/arch/x86/cpu/queensbay/Kconfig > @@ -29,7 +29,7 @@ config FSP_FILE > The filename of the file to use as Firmware Support Package binary > in the board directory. > > -config FSP_LOCATION > +config FSP_ADDR > hex "Firmware Support Package binary location" > depends on HAVE_FSP > default 0xfffc0000 > @@ -65,7 +65,7 @@ config CMC_FILE > The filename of the file to use as Chipset Micro Code state machine > binary in the board directory. > > -config CMC_LOCATION > +config CMC_ADDR > hex "Chipset Micro Code state machine binary location" > depends on HAVE_CMC > default 0xfffb0000 > diff --git a/arch/x86/cpu/queensbay/fsp_support.c > b/arch/x86/cpu/queensbay/fsp_support.c > index 58a30de..e85f823 100644 > --- a/arch/x86/cpu/queensbay/fsp_support.c > +++ b/arch/x86/cpu/queensbay/fsp_support.c > @@ -64,7 +64,7 @@ UINT32 __attribute__((optimize("O0"))) find_fsp_header(void) > volatile register UINT8 * fsp asm("eax"); > > /* Initalize the FSP base */ > - fsp = (UINT8 *)CONFIG_FSP_LOCATION; > + fsp = (UINT8 *)CONFIG_FSP_ADDR; > > /* Check the FV signature, _FVH */ > if (((EFI_FIRMWARE_VOLUME_HEADER *)fsp)->signature == 0x4856465F) { > diff --git a/arch/x86/cpu/queensbay/tnc_car.S > b/arch/x86/cpu/queensbay/tnc_car.S > index 4f39e42..344597b 100644 > --- a/arch/x86/cpu/queensbay/tnc_car.S > +++ b/arch/x86/cpu/queensbay/tnc_car.S > @@ -29,7 +29,7 @@ find_fsp_header_ret: > mov %eax, %ebp > > /* sanity test */ > - cmp $CONFIG_FSP_LOCATION, %eax > + cmp $CONFIG_FSP_ADDR, %eax > jb die > > /* calculate TempRamInitEntry address */ > diff --git a/include/configs/chromebook_link.h > b/include/configs/chromebook_link.h > index 645b31c..c9d84e4 100644 > --- a/include/configs/chromebook_link.h > +++ b/include/configs/chromebook_link.h > @@ -25,7 +25,7 @@ > > #define CONFIG_X86_RESET_VECTOR > #define CONFIG_NR_DRAM_BANKS 8 > -#define CONFIG_X86_MRC_START 0xfffa0000 > +#define CONFIG_X86_MRC_ADDR 0xfffa0000 > #define CONFIG_CACHE_MRC_SIZE_KB 512 > > #define CONFIG_COREBOOT_SERIAL > -- > 1.8.2.1 > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot