This is a system control block mainly used for clock and reset control.
Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
---
arch/arm/dts/uniphier-common32.dtsi | 8 ++++++++
arch/arm/dts/uniphier-ph1-ld4.dtsi | 4 ++++
arch/arm/dts/uniphier-ph1-pro4.dtsi | 4 ++++
arch/arm/dts/uniphier-ph1-pro5.dtsi | 4 ++++
arch/arm/dts/uniphier-ph1-sld3.dtsi | 8 ++++++++
arch/arm/dts/uniphier-ph1-sld8.dtsi | 4 ++++
arch/arm/dts/uniphier-proxstream2.dtsi | 4 ++++
7 files changed, 36 insertions(+)
diff --git a/arch/arm/dts/uniphier-common32.dtsi
b/arch/arm/dts/uniphier-common32.dtsi
index de04de1..d3e5a74 100644
--- a/arch/arm/dts/uniphier-common32.dtsi
+++ b/arch/arm/dts/uniphier-common32.dtsi
@@ -101,6 +101,14 @@
reg = <0x5f801000 0xe00>;
};
+ sysctrl: sysctrl@61840000 {
+ /* specify compatible in each SoC DTSI */
+ reg = <0x61840000 0x4000>;
+ #clock-cells = <1>;
+ clock-names = "ref";
+ clocks = <&refclk>;
+ };
+
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
diff --git a/arch/arm/dts/uniphier-ph1-ld4.dtsi
b/arch/arm/dts/uniphier-ph1-ld4.dtsi
index 6f15978..6bd4b91 100644
--- a/arch/arm/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-ld4.dtsi
@@ -160,3 +160,7 @@
&pinctrl {
compatible = "socionext,ph1-ld4-pinctrl", "syscon";
};
+
+&sysctrl {
+ compatible = "socionext,ph1-ld4-sysctrl";
+};
diff --git a/arch/arm/dts/uniphier-ph1-pro4.dtsi
b/arch/arm/dts/uniphier-ph1-pro4.dtsi
index a236dbc..984f99c 100644
--- a/arch/arm/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro4.dtsi
@@ -200,3 +200,7 @@
&pinctrl {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
};
+
+&sysctrl {
+ compatible = "socionext,ph1-pro4-sysctrl";
+};
diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi
b/arch/arm/dts/uniphier-ph1-pro5.dtsi
index 120767c..a836176 100644
--- a/arch/arm/dts/uniphier-ph1-pro5.dtsi
+++ b/arch/arm/dts/uniphier-ph1-pro5.dtsi
@@ -194,3 +194,7 @@
&pinctrl {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
};
+
+&sysctrl {
+ compatible = "socionext,ph1-pro5-sysctrl";
+};
diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi
b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 9ff9584..c7a8902 100644
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -206,6 +206,14 @@
interrupts = <0 83 4>;
};
+ sysctrl: sysctrl@f1840000 {
+ compatible = "socionext,ph1-sld3-sysctrl";
+ reg = <0xf1840000 0x4000>;
+ #clock-cells = <1>;
+ clock-names = "ref";
+ clocks = <&refclk>;
+ };
+
nand: nand@f8000000 {
compatible = "denali,denali-nand-dt";
reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;
diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi
b/arch/arm/dts/uniphier-ph1-sld8.dtsi
index e765a4b..9d97fb0 100644
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld8.dtsi
@@ -160,3 +160,7 @@
&pinctrl {
compatible = "socionext,ph1-sld8-pinctrl", "syscon";
};
+
+&sysctrl {
+ compatible = "socionext,ph1-sld8-sysctrl";
+};
diff --git a/arch/arm/dts/uniphier-proxstream2.dtsi
b/arch/arm/dts/uniphier-proxstream2.dtsi
index c7423ff..f6f4bbe 100644
--- a/arch/arm/dts/uniphier-proxstream2.dtsi
+++ b/arch/arm/dts/uniphier-proxstream2.dtsi
@@ -205,3 +205,7 @@
&pinctrl {
compatible = "socionext,proxstream2-pinctrl", "syscon";
};
+
+&sysctrl {
+ compatible = "socionext,proxstream2-sysctrl";
+};
--
1.9.1
_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
