Hi Simon,
On 2016年06月30日 23:23, Simon Glass wrote:
Hi Ziyuan,
On 30 June 2016 at 00:21, Ziyuan Xu <xzy...@rock-chips.com> wrote:
Redefine RX FIFO size & TX FIFO size for rk3288.
Signed-off-by: Ziyuan Xu <xzy...@rock-chips.com>
---
drivers/usb/gadget/dwc2_udc_otg_regs.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h
b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 78ec90e..a0617c8 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -130,8 +130,14 @@ struct dwc2_usbotg_reg {
#define HIGH_SPEED_CONTROL_PKT_SIZE 64
#define HIGH_SPEED_BULK_PKT_SIZE 512
+#ifdef CONFIG_ROCKCHIP_RK3288
+#define RX_FIFO_SIZE (275*4)
+#define NPTX_FIFO_SIZE (16*4)
+#else
#define RX_FIFO_SIZE (1024*4)
#define NPTX_FIFO_SIZE (1024*4)
+#endif
I cannot see where this is used. Can you explain? Also can you add a
reason for the change in your commit message?
The total FIFO size of dwc2 on Rockchip SoCs is shorter than the
existent, so redefined
them to fit Rockchip SoCs.
+
#define PTX_FIFO_SIZE (1536*1)
#define DEPCTL_TXFNUM_0 (0x0<<22)
--
1.9.1
Regards,
Simon
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