Hi All, Any comments?
> -----Original Message----- > From: Zhiqiang Hou [mailto:zhiqiang....@nxp.com] > Sent: 2016年7月4日 14:28 > To: u-boot@lists.denx.de; albert.u.b...@aribaud.net; york sun > <york....@nxp.com>; w...@denx.de; Prabhakar Kushwaha > <prabhakar.kushw...@nxp.com>; alison.w...@freescale.com; > mingkai...@freescale.com > Cc: yao.y...@freescale.com; qianyu.g...@freescale.com; > bmeng...@gmail.com; Shengzhou Liu <shengzhou....@nxp.com>; Zhiqiang Hou > <zhiqiang....@nxp.com> > Subject: [PATCH 1/5] fsl: serdes: ensure accessing the initialized maps of > serdes > protocol > > From: Hou Zhiqiang <zhiqiang....@nxp.com> > > Up to now, the function is_serdes_configed() doesn't check if the map of > serdes > protocol is initialized before accessing it. The function > is_serdes_configed() will get wrong result when it was called before the > serdes > protocol maps initialized. As the first eliment of the map isn't used for any > device, > so use it as the flag to indicate if the map has been initialized. > > Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com> > --- > Tested on LS1043ARDB, LS1021AQDS and T4240QDS boards. > > arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c | 9 +++++++++ > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c | 6 ++++++ > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c | 9 +++++++++ > arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/c29x_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c | 15 +++++++++++++++ > arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c | 16 +++++++++++++++- > arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c | 16 +++++++++++++++- > arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/p1010_serdes.c | 16 +++++++++++++++- > arch/powerpc/cpu/mpc85xx/p1021_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc85xx/p1022_serdes.c | 16 +++++++++++++++- > arch/powerpc/cpu/mpc85xx/p1023_serdes.c | 9 ++++++++- > arch/powerpc/cpu/mpc85xx/p2020_serdes.c | 6 ++++++ > arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c | 16 +++++++++++++++- > arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c | 16 +++++++++++++++- > 20 files changed, 191 insertions(+), 7 deletions(-) > > diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > index 9b78acb..ffb05cb 100644 > --- a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > +++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c > @@ -23,9 +23,15 @@ int is_serdes_configured(enum srds_prtcl device) > u64 ret = 0; > > #ifdef CONFIG_SYS_FSL_SRDS_1 > + if (!(serdes1_prtcl_map & 1ULL << NONE)) > + fsl_serdes_init(); > + > ret |= (1ULL << device) & serdes1_prtcl_map; #endif #ifdef > CONFIG_SYS_FSL_SRDS_2 > + if (!(serdes2_prtcl_map & 1ULL << NONE)) > + fsl_serdes_init(); > + > ret |= (1ULL << device) & serdes2_prtcl_map; #endif > > @@ -87,6 +93,9 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 > sd_prctl_shift) > serdes_prtcl_map |= (1ULL << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes_prtcl_map |= (1ULL << NONE); > + > return serdes_prtcl_map; > } > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c > b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c > index fe3444a..fff80ef 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c > +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c > @@ -19,6 +19,9 @@ int is_serdes_configured(enum srds_prtcl device) > int ret = 0; > > #ifdef CONFIG_SYS_FSL_SRDS_1 > + if (!serdes1_prtcl_map[NONE]) > + fsl_serdes_init(); > + > ret |= serdes1_prtcl_map[device]; > #endif > > @@ -103,6 +106,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, > u32 sd_prctl_shift, > else > serdes_prtcl_map[lane_prtcl] = 1; > } > + > + /* Set the first eliment to indicate serdes has been initialized */ > + serdes_prtcl_map[NONE] = 1; > } > > void fsl_serdes_init(void) > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c > b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c > index be6acc6..d83a073 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c > +++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c > @@ -28,9 +28,15 @@ int is_serdes_configured(enum srds_prtcl device) > int ret = 0; > > #ifdef CONFIG_SYS_FSL_SRDS_1 > + if (!serdes1_prtcl_map[NONE]) > + fsl_serdes_init(); > + > ret |= serdes1_prtcl_map[device]; > #endif > #ifdef CONFIG_SYS_FSL_SRDS_2 > + if (!serdes2_prtcl_map[NONE]) > + fsl_serdes_init(); > + > ret |= serdes2_prtcl_map[device]; > #endif > > @@ -136,6 +142,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, > u32 sd_prctl_shift, #endif > } > } > + > + /* Set the first eliment to indicate serdes has been initialized */ > + serdes_prtcl_map[NONE] = 1; > } > > void fsl_serdes_init(void) > diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c > b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c > index 399b208..414e1ea 100644 > --- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c > @@ -68,6 +68,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl prtcl) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << prtcl) & serdes1_prtcl_map; } > > @@ -90,4 +93,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; > serdes1_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c > b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c > index 51972cb..469ef45 100644 > --- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c > @@ -32,6 +32,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = { > > int is_serdes_configured(enum srds_prtcl device) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes1_prtcl_map; } > > @@ -59,4 +62,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = ptr->lanes[lane]; > serdes1_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c > b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c > index 9920839..93b0aa8 100644 > --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c > @@ -92,15 +92,27 @@ int is_serdes_configured(enum srds_prtcl device) > int ret = 0; > > #ifdef CONFIG_SYS_FSL_SRDS_1 > + if (!serdes1_prtcl_map[NONE]) > + fsl_serdes_init(); > + > ret |= serdes1_prtcl_map[device]; > #endif > #ifdef CONFIG_SYS_FSL_SRDS_2 > + if (!serdes2_prtcl_map[NONE]) > + fsl_serdes_init(); > + > ret |= serdes2_prtcl_map[device]; > #endif > #ifdef CONFIG_SYS_FSL_SRDS_3 > + if (!serdes3_prtcl_map[NONE]) > + fsl_serdes_init(); > + > ret |= serdes3_prtcl_map[device]; > #endif > #ifdef CONFIG_SYS_FSL_SRDS_4 > + if (!serdes4_prtcl_map[NONE]) > + fsl_serdes_init(); > + > ret |= serdes4_prtcl_map[device]; > #endif > > @@ -325,6 +337,9 @@ void serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, > u32 sd_prctl_shift, > else > serdes_prtcl_map[lane_prtcl] = 1; > } > + > + /* Set the first eliment to indicate serdes has been initialized */ > + serdes_prtcl_map[NONE] = 1; > } > > void fsl_serdes_init(void) > diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > index ba22f90..45b43a4 100644 > --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > @@ -136,6 +136,9 @@ int is_serdes_configured(enum srds_prtcl device) > if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) > return 0; > > + if (!(serdes_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes_prtcl_map; } > > @@ -857,6 +860,9 @@ void fsl_serdes_init(void) > SRDS_RSTCTL_SDPD); > } > #endif > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes_prtcl_map |= (1 << NONE); > } > > const char *serdes_clock_to_string(u32 clock) diff --git > a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c > b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c > index baf52d5..921ea7a 100644 > --- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c > @@ -71,11 +71,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl device) { > - int ret = (1 << device) & serdes1_prtcl_map; > + int ret; > + > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > + ret = (1 << device) & serdes1_prtcl_map; > > if (ret) > return ret; > > + if (!(serdes2_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes2_prtcl_map; } > > @@ -221,6 +229,9 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > + > if (srds2_io_sel >= ARRAY_SIZE(serdes2_cfg_tbl)) { > printf("Invalid PORDEVSR[SRDS2_IO_SEL] = %d\n", srds2_io_sel); > return; > @@ -230,4 +241,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = > serdes2_cfg_tbl[srds2_io_sel][lane]; > serdes2_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes2_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c > b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c > index ed78a66..c697dff 100644 > --- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c > @@ -34,11 +34,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl device) { > - int ret = (1 << device) & serdes1_prtcl_map; > + int ret; > + > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > + ret = (1 << device) & serdes1_prtcl_map; > > if (ret) > return ret; > > + if (!(serdes2_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes2_prtcl_map; } > > @@ -61,6 +69,9 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > + > if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { > printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); > return; > @@ -76,4 +87,7 @@ void fsl_serdes_init(void) > > if (pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS) > serdes2_prtcl_map &= ~(1 << SGMII_TSEC3); > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes2_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c > b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c > index d146955..58dfee0 100644 > --- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c > @@ -24,6 +24,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl prtcl) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << prtcl) & serdes1_prtcl_map; } > > @@ -46,4 +49,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_cfg][lane]; > serdes1_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c > b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c > index 9199f01..cf35fd2 100644 > --- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c > @@ -24,6 +24,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl prtcl) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << prtcl) & serdes1_prtcl_map; } > > @@ -46,4 +49,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; > serdes1_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c > b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c > index 6c80b5e..941f6f0 100644 > --- a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c > @@ -33,6 +33,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl prtcl) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << prtcl) & serdes1_prtcl_map; } > > @@ -55,4 +58,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; > serdes1_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c > b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c > index 3632eb5..455d3a3 100644 > --- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c > @@ -28,6 +28,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl prtcl) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << prtcl) & serdes1_prtcl_map; } > > @@ -62,4 +65,7 @@ void fsl_serdes_init(void) > > if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS)) > serdes1_prtcl_map |= (1 << SGMII_TSEC4); > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c > b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c > index 4b965f7..3f2bd25 100644 > --- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c > @@ -33,11 +33,19 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl device) { > - int ret = (1 << device) & serdes1_prtcl_map; > + int ret; > + > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > + ret = (1 << device) & serdes1_prtcl_map; > > if (ret) > return ret; > > + if (!(serdes2_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes2_prtcl_map; } > > @@ -60,6 +68,9 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > + > if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { > printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); > return; > @@ -69,4 +80,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; > serdes2_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes2_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c > b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c > index 99a77bd..e8eb9e7 100644 > --- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c > @@ -41,6 +41,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl prtcl) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << prtcl) & serdes1_prtcl_map; } > > @@ -67,6 +70,9 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > + > /* Init SERDES Receiver electrical idle detection control for PCIe */ > > /* Lane 0 is always PCIe 1 */ > diff --git a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c > b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c > index 14d17eb..942df29 100644 > --- a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c > @@ -72,11 +72,19 @@ static const u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl device) { > - int ret = (1 << device) & serdes1_prtcl_map; > + int ret; > + > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > + ret = (1 << device) & serdes1_prtcl_map; > > if (ret) > return ret; > > + if (!(serdes2_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes2_prtcl_map; } > > @@ -99,6 +107,9 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > + > if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { > printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); > return; > @@ -108,4 +119,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; > serdes2_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes2_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c > b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c > index e83b0a3..21cb91d 100644 > --- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c > @@ -24,7 +24,12 @@ static const u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl device) { > - int ret = (1 << device) & serdes1_prtcl_map; > + int ret; > + > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > + ret = (1 << device) & serdes1_prtcl_map; > return ret; > } > > @@ -47,4 +52,6 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c > b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c > index 59d402c..91a62fb 100644 > --- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c > @@ -32,6 +32,9 @@ static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl prtcl) { > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << prtcl) & serdes1_prtcl_map; } > > @@ -54,4 +57,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; > serdes1_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c > b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c > index 2a7e3bf..3dde1ce 100644 > --- a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c > +++ b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c > @@ -29,11 +29,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl device) { > - int ret = (1 << device) & serdes1_prtcl_map; > + int ret; > + > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > + ret = (1 << device) & serdes1_prtcl_map; > > if (ret) > return ret; > > + if (!(serdes2_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes2_prtcl_map; } > > @@ -57,6 +65,9 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > + > if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { > printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); > return; > @@ -66,4 +77,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; > serdes2_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes2_prtcl_map |= (1 << NONE); > } > diff --git a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c > b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c > index cc0f8e9..93da038 100644 > --- a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c > +++ b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c > @@ -38,11 +38,19 @@ static u8 serdes2_cfg_tbl[][SRDS2_MAX_LANES] = { > > int is_serdes_configured(enum srds_prtcl device) { > - int ret = (1 << device) & serdes1_prtcl_map; > + int ret; > + > + if (!(serdes1_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > + ret = (1 << device) & serdes1_prtcl_map; > > if (ret) > return ret; > > + if (!(serdes2_prtcl_map & 1 << NONE)) > + fsl_serdes_init(); > + > return (1 << device) & serdes2_prtcl_map; } > > @@ -66,6 +74,9 @@ void fsl_serdes_init(void) > serdes1_prtcl_map |= (1 << lane_prtcl); > } > > + /* Set the first bit to indicate serdes has been initialized */ > + serdes1_prtcl_map |= (1 << NONE); > + > if (srds_cfg >= ARRAY_SIZE(serdes2_cfg_tbl)) { > printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); > return; > @@ -75,4 +86,7 @@ void fsl_serdes_init(void) > enum srds_prtcl lane_prtcl = serdes2_cfg_tbl[srds_cfg][lane]; > serdes2_prtcl_map |= (1 << lane_prtcl); > } > + > + /* Set the first bit to indicate serdes has been initialized */ > + serdes2_prtcl_map |= (1 << NONE); > } > -- > 2.1.0.27.g96db324 Thanks, Zhiqiang _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot